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Searched refs:regDSCC0_DSCC_PPS_CONFIG18 (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_5_offset.h12384 #define regDSCC0_DSCC_PPS_CONFIG18 global() macro
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H A Ddcn_3_5_0_offset.h10543 #define regDSCC0_DSCC_PPS_CONFIG18 global() macro
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H A Ddcn_3_6_0_offset.h12604 #define regDSCC0_DSCC_PPS_CONFIG18 global() macro
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H A Ddcn_3_1_2_offset.h12519 #define regDSCC0_DSCC_PPS_CONFIG18 global() macro
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H A Ddcn_3_1_4_offset.h11644 #define regDSCC0_DSCC_PPS_CONFIG18 global() macro
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H A Ddcn_3_2_1_offset.h11768 #define regDSCC0_DSCC_PPS_CONFIG18 global() macro
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H A Ddcn_3_5_1_offset.h10522 #define regDSCC0_DSCC_PPS_CONFIG18 global() macro
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H A Ddcn_4_1_0_offset.h11959 #define regDSCC0_DSCC_PPS_CONFIG18 global() macro
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H A Ddcn_3_1_6_offset.h13115 #define regDSCC0_DSCC_PPS_CONFIG18 global() macro
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