Searched refs:regCP_HQD_PQ_WPTR_LO (Results 1 – 10 of 10) sorted by relevance
| /linux/drivers/gpu/drm/amd/amdgpu/ ! |
| H A D | amdgpu_amdkfd_gc_9_4_3.c | 338 WREG32_SOC15_RLC(GC, GET_INST(GC, inst), regCP_HQD_PQ_WPTR_LO, in kgd_gfx_v9_4_3_hqd_load()
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| H A D | amdgpu_amdkfd_gfx_v11.c | 234 WREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_PQ_WPTR_LO), in hqd_load_v11()
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| H A D | mes_v11_0.c | 1540 WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_LO, 0); in mes_v11_0_kiq_dequeue()
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| H A D | mes_v12_0.c | 1718 WREG32_SOC15(GC, 0, regCP_HQD_PQ_WPTR_LO, 0); in mes_v12_0_kiq_dequeue_sched()
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| /linux/drivers/gpu/drm/amd/include/asic_reg/gc/ ! |
| H A D | gc_9_4_2_offset.h | 805 #define regCP_HQD_PQ_WPTR_LO … macro
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| H A D | gc_9_4_3_offset.h | 3394 #define regCP_HQD_PQ_WPTR_LO … macro
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| H A D | gc_11_5_0_offset.h | 3685 #define regCP_HQD_PQ_WPTR_LO … macro
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| H A D | gc_12_0_0_offset.h | 3952 #define regCP_HQD_PQ_WPTR_LO … macro
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| H A D | gc_11_0_3_offset.h | 4936 #define regCP_HQD_PQ_WPTR_LO … macro
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| H A D | gc_11_0_0_offset.h | 4712 #define regCP_HQD_PQ_WPTR_LO … macro
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