Home
last modified time | relevance | path

Searched refs:regCP_HQD_PQ_RPTR (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dmes_v11_0.c1542 WREG32_SOC15(GC, 0, regCP_HQD_PQ_RPTR, 0); in mes_v11_0_kiq_dequeue()
H A Dmes_v12_0.c1720 WREG32_SOC15(GC, 0, regCP_HQD_PQ_RPTR, 0); in mes_v12_0_kiq_dequeue_sched()
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_2_offset.h713 #define regCP_HQD_PQ_RPTR … macro
H A Dgc_9_4_3_offset.h3302 #define regCP_HQD_PQ_RPTR … macro
H A Dgc_11_5_0_offset.h3593 #define regCP_HQD_PQ_RPTR … macro
H A Dgc_12_0_0_offset.h3862 #define regCP_HQD_PQ_RPTR … macro
H A Dgc_11_0_3_offset.h4844 #define regCP_HQD_PQ_RPTR … macro
H A Dgc_11_0_0_offset.h4620 #define regCP_HQD_PQ_RPTR … macro