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Searched refs:regCM1_CM_GAMCOR_RAMA_OFFSET_G (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_5_offset.h4388 #define regCM1_CM_GAMCOR_RAMA_OFFSET_G 0x0ebc macro
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H A Ddcn_3_5_0_offset.h5099 #define regCM1_CM_GAMCOR_RAMA_OFFSET_G 0x0ebc macro
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H A Ddcn_3_6_0_offset.h4200 #define regCM1_CM_GAMCOR_RAMA_OFFSET_G 0x0ebc macro
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H A Ddcn_3_1_2_offset.h4629 #define regCM1_CM_GAMCOR_RAMA_OFFSET_G 0x0ebc macro
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H A Ddcn_3_1_4_offset.h5538 #define regCM1_CM_GAMCOR_RAMA_OFFSET_G 0x0ebc macro
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H A Ddcn_3_2_1_offset.h3852 #define regCM1_CM_GAMCOR_RAMA_OFFSET_G 0x0ebc macro
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H A Ddcn_3_5_1_offset.h5078 #define regCM1_CM_GAMCOR_RAMA_OFFSET_G 0x0ebc macro
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H A Ddcn_4_1_0_offset.h4137 #define regCM1_CM_GAMCOR_RAMA_OFFSET_G 0x0ef6 macro
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H A Ddcn_3_1_6_offset.h4849 #define regCM1_CM_GAMCOR_RAMA_OFFSET_G 0x0ebc macro
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