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Searched refs:reg4 (Results 1 – 25 of 76) sorted by relevance

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/linux/arch/arm/lib/
H A Dcopy_from_user.S46 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
50 ldr1w \ptr, \reg4, \abort
53 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
54 ldr4w \ptr, \reg1, \reg2, \reg3, \reg4, \abort
66 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
67 USERL(\abort, ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4})
70 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
71 USERL(\abort, ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8})
86 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
87 stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
H A Dcopy_to_user.S40 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
41 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4}
44 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
45 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
64 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
68 str1w \ptr, \reg4, \abort
83 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
84 USERL(\abort, stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8})
H A Dmemcpy.S21 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
22 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4}
25 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
26 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
37 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
38 stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
H A Dcsumpartialcopy.S43 .macro load4l, reg1, reg2, reg3, reg4 argument
44 ldmia r0!, {\reg1, \reg2, \reg3, \reg4}
H A Dcsumpartialcopyuser.S74 .macro load4l, reg1, reg2, reg3, reg4 argument
78 ldrusr \reg4, r0, 4
/linux/sound/soc/codecs/
H A Drt715-sdw.c153 unsigned int reg2 = 0, reg3 = 0, reg4 = 0, mask, nid, val2; in rt715_sdw_read() local
180 reg4 = reg3 + 0x1000; in rt715_sdw_read()
181 reg4 |= 0x80; in rt715_sdw_read()
182 ret = regmap_write(rt715->sdw_regmap, reg4, (*val & 0xff)); in rt715_sdw_read()
263 reg, reg2, reg3, reg4, *val); in rt715_sdw_read()
275 unsigned int reg2 = 0, reg3, reg4, nid, mask, val2; in rt715_sdw_write() local
302 reg4 = reg3 + 0x1000; in rt715_sdw_write()
303 reg4 |= 0x80; in rt715_sdw_write()
304 ret = regmap_write(rt715->sdw_regmap, reg4, (val & 0xff)); in rt715_sdw_write()
342 __func__, reg, reg2, reg3, reg4, val2, val); in rt715_sdw_write()
H A Drt711-sdw.c96 unsigned int reg2 = 0, reg3 = 0, reg4 = 0, mask, nid, val2; in rt711_sdw_read() local
123 reg4 = reg3 + 0x1000; in rt711_sdw_read()
124 reg4 |= 0x80; in rt711_sdw_read()
125 ret = regmap_write(rt711->sdw_regmap, reg4, (*val & 0xff)); in rt711_sdw_read()
206 __func__, reg, reg2, reg3, reg4, *val); in rt711_sdw_read()
218 unsigned int reg2 = 0, reg3, reg4, nid, mask, val2; in rt711_sdw_write() local
245 reg4 = reg3 + 0x1000; in rt711_sdw_write()
246 reg4 |= 0x80; in rt711_sdw_write()
247 ret = regmap_write(rt711->sdw_regmap, reg4, (val & 0xff)); in rt711_sdw_write()
285 __func__, reg, reg2, reg3, reg4, val2, val); in rt711_sdw_write()
H A Drt700-sdw.c90 unsigned int reg2 = 0, reg3 = 0, reg4 = 0, mask, nid, val2; in rt700_sdw_read() local
117 reg4 = reg3 + 0x1000; in rt700_sdw_read()
118 reg4 |= 0x80; in rt700_sdw_read()
119 ret = regmap_write(rt700->sdw_regmap, reg4, (*val & 0xff)); in rt700_sdw_read()
200 __func__, reg, reg2, reg3, reg4, *val); in rt700_sdw_read()
212 unsigned int reg2 = 0, reg3, reg4, nid, mask, val2; in rt700_sdw_write() local
239 reg4 = reg3 + 0x1000; in rt700_sdw_write()
240 reg4 |= 0x80; in rt700_sdw_write()
241 ret = regmap_write(rt700->sdw_regmap, reg4, (val & 0xff)); in rt700_sdw_write()
279 __func__, reg, reg2, reg3, reg4, val2, val); in rt700_sdw_write()
H A Dwm9081.c549 u16 reg1, reg4, reg5; in wm9081_set_fll() local
608 reg4 = snd_soc_component_read(component, WM9081_FLL_CONTROL_4); in wm9081_set_fll()
609 reg4 &= ~WM9081_FLL_N_MASK; in wm9081_set_fll()
610 reg4 |= fll_div.n << WM9081_FLL_N_SHIFT; in wm9081_set_fll()
611 snd_soc_component_write(component, WM9081_FLL_CONTROL_4, reg4); in wm9081_set_fll()
/linux/arch/powerpc/include/asm/
H A Dsyscalls.h101 long sys_ppc_truncate64(const char __user *path, u32 reg4,
103 long sys_ppc_ftruncate64(unsigned int fd, u32 reg4,
127 long compat_sys_ppc_truncate64(const char __user *path, u32 reg4,
129 long compat_sys_ppc_ftruncate64(unsigned int fd, u32 reg4,
/linux/arch/powerpc/kernel/
H A Dsys_ppc32.c94 const char __user *, path, u32, reg4, in PPC32_SYSCALL_DEFINE4() argument
101 unsigned int, fd, u32, reg4, in PPC32_SYSCALL_DEFINE4() argument
/linux/arch/arm/probes/kprobes/
H A Dtest-core.h256 #define TEST_RRRR(code1, reg1, val1, code2, reg2, val2, code3, reg3, val3, code4, reg4, val4) \ argument
257 TESTCASE_START(code1 #reg1 code2 #reg2 code3 #reg3 code4 #reg4) \
261 TEST_ARG_REG(reg4, val4) \
263 TEST_INSTRUCTION(code1 #reg1 code2 #reg2 code3 #reg3 code4 #reg4) \
/linux/drivers/net/ethernet/8390/
H A Dsmc-ultra.c213 unsigned char reg4 = inb(ioaddr + 4) & 0x7f; in ultra_probe1() local
227 outb(reg4, ioaddr + 4); in ultra_probe1()
250 outb(0x80 | reg4, ioaddr + 4); in ultra_probe1()
260 outb(reg4, ioaddr + 4); in ultra_probe1()
/linux/drivers/video/fbdev/omap2/omapfb/displays/
H A Dpanel-tpo-td043mtea1.c140 u8 reg4 = TPO_R04_NFLIP_H | TPO_R04_NFLIP_V | in tpo_td043_write_mirror() local
143 reg4 &= ~TPO_R04_NFLIP_H; in tpo_td043_write_mirror()
145 reg4 &= ~TPO_R04_NFLIP_V; in tpo_td043_write_mirror()
147 return tpo_td043_write(spi, 4, reg4); in tpo_td043_write_mirror()
/linux/drivers/gpu/drm/panel/
H A Dpanel-tpo-td043mtea1.c125 u8 reg4 = TPO_R04_NFLIP_H | TPO_R04_NFLIP_V | in td043mtea1_write_mirror() local
128 reg4 &= ~TPO_R04_NFLIP_V; in td043mtea1_write_mirror()
130 return td043mtea1_write(lcd, 4, reg4); in td043mtea1_write_mirror()
/linux/drivers/devfreq/event/
H A Drockchip-dfi.c772 u32 reg2, reg3, reg4, reg6; in rk3588_dfi_init() local
776 regmap_read(regmap_pmu, RK3588_PMUGRF_OS_REG4, &reg4); in rk3588_dfi_init()
790 dfi->buswidth[2] = FIELD_GET(RK3568_PMUGRF_OS_REG2_BW_CH0, reg4) == 0 ? 4 : 2; in rk3588_dfi_init()
791 dfi->buswidth[3] = FIELD_GET(RK3588_PMUGRF_OS_REG2_BW_CH1, reg4) == 0 ? 4 : 2; in rk3588_dfi_init()
793 FIELD_GET(RK3588_PMUGRF_OS_REG2_CH_INFO, reg4) << 2; in rk3588_dfi_init()
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3588-firefly-icore-3588q.dtsi215 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
338 vcc_3v3_s0: pldo-reg4 {
413 vdd_0v85_s0: nldo-reg4 {
H A Drk3588-firefly-core-3588j.dtsi218 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
341 avcc_3v3_s0: pldo-reg4 {
416 avdd_0v85_s0: nldo-reg4 {
H A Drk3588-evb2-v10.dts343 vdd_vdenc_s0: dcdc-reg4 {
470 vcc_3v3_s3: pldo-reg4 {
544 avdd_0v75_s0: nldo-reg4 {
654 vcc_3v3_s0: dcdc-reg4 {
778 vcc_3v3_sd_s0: pldo-reg4 {
849 avdd_1v2_cam_s0: nldo-reg4 {
H A Drk3588-edgeble-neu6a-common.dtsi246 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
370 vcc_3v3_s0: pldo-reg4 {
447 vdd_0v85_s0: nldo-reg4 {
H A Drk3588-armsom-lm7.dtsi229 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
353 vcc_3v3_s0: pldo-reg4 {
430 vdd_0v85_s0: nldo-reg4 {
H A Drk3588s-orangepi-cm5.dtsi233 vdd_vdenc_s0: dcdc-reg4 {
358 vcc_3v3_s0: pldo-reg4 {
433 vdd_0v85_s0: nldo-reg4 {
H A Drk3588-quartzpro64.dts577 vdd_vdenc_s0: dcdc-reg4 {
714 vcc_3v3_s3: pldo-reg4 {
795 avdd_0v75_s0: nldo-reg4 {
910 vcc_3v3_s0: dcdc-reg4 {
1046 vcc_3v3_sd_s0: pldo-reg4 {
1126 avdd_1v2_cam_s0: nldo-reg4 {
H A Drk3588s-evb1-v10.dts567 vdd_vdenc_s0: dcdc-reg4 {
698 vcc_3v3_s0: pldo-reg4 {
772 avdd_0v75_s0: nldo-reg4 {
887 vcc_3v3_s3: dcdc-reg4 {
1022 vcc_3v3_sd_s0: pldo-reg4 {
1094 avdd_1v2_cam_s0: nldo-reg4 {
H A Drk3588-fet3588-c.dtsi327 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
451 vcc_3v3_s0: pldo-reg4 {
528 vdd_0v85_s0: nldo-reg4 {

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