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Searched refs:readl (Results 1 – 25 of 2063) sorted by relevance

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/linux/drivers/net/ethernet/stmicro/stmmac/
H A Dmmc_core.c237 u32 value = readl(mmcaddr + MMC_CNTRL); in dwmac_mmc_ctrl()
262 mmc->mmc_tx_octetcount_gb += readl(mmcaddr + MMC_TX_OCTETCOUNT_GB); in dwmac_mmc_read()
263 mmc->mmc_tx_framecount_gb += readl(mmcaddr + MMC_TX_FRAMECOUNT_GB); in dwmac_mmc_read()
264 mmc->mmc_tx_broadcastframe_g += readl(mmcaddr + in dwmac_mmc_read()
266 mmc->mmc_tx_multicastframe_g += readl(mmcaddr + in dwmac_mmc_read()
268 mmc->mmc_tx_64_octets_gb += readl(mmcaddr + MMC_TX_64_OCTETS_GB); in dwmac_mmc_read()
270 readl(mmcaddr + MMC_TX_65_TO_127_OCTETS_GB); in dwmac_mmc_read()
272 readl(mmcaddr + MMC_TX_128_TO_255_OCTETS_GB); in dwmac_mmc_read()
274 readl(mmcaddr + MMC_TX_256_TO_511_OCTETS_GB); in dwmac_mmc_read()
276 readl(mmcaddr + MMC_TX_512_TO_1023_OCTETS_GB); in dwmac_mmc_read()
[all …]
H A Ddwmac4_dma.c20 u32 value = readl(ioaddr + DMA_SYS_BUS_MODE); in dwmac4_dma_axi()
54 value = readl(ioaddr + DMA_CHAN_RX_CONTROL(dwmac4_addrs, chan)); in dwmac4_dma_init_rx_chan()
75 value = readl(ioaddr + DMA_CHAN_TX_CONTROL(dwmac4_addrs, chan)); in dwmac4_dma_init_tx_chan()
99 value = readl(ioaddr + DMA_CHAN_CONTROL(dwmac4_addrs, chan)); in dwmac4_dma_init_channel()
117 value = readl(ioaddr + DMA_CHAN_CONTROL(dwmac4_addrs, chan)); in dwmac410_dma_init_channel()
131 u32 value = readl(ioaddr + DMA_SYS_BUS_MODE); in dwmac4_dma_init()
149 value = readl(ioaddr + DMA_BUS_MODE); in dwmac4_dma_init()
173 readl(ioaddr + DMA_CHAN_CONTROL(dwmac4_addrs, channel)); in _dwmac4_dump_dma_regs()
175 readl(ioaddr + DMA_CHAN_TX_CONTROL(dwmac4_addrs, channel)); in _dwmac4_dump_dma_regs()
177 readl(ioaddr + DMA_CHAN_RX_CONTROL(dwmac4_addrs, channel)); in _dwmac4_dump_dma_regs()
[all …]
H A Ddwxgmac2_dma.c13 u32 value = readl(ioaddr + XGMAC_DMA_MODE); in dwxgmac2_dma_reset()
25 u32 value = readl(ioaddr + XGMAC_DMA_SYSBUS_MODE); in dwxgmac2_dma_init()
40 u32 value = readl(ioaddr + XGMAC_DMA_CH_CONTROL(chan)); in dwxgmac2_dma_init_chan()
57 value = readl(ioaddr + XGMAC_DMA_CH_RX_CONTROL(chan)); in dwxgmac2_dma_init_rx_chan()
73 value = readl(ioaddr + XGMAC_DMA_CH_TX_CONTROL(chan)); in dwxgmac2_dma_init_tx_chan()
83 u32 value = readl(ioaddr + XGMAC_DMA_SYSBUS_MODE); in dwxgmac2_dma_axi()
114 reg_space[i] = readl(ioaddr + i * 4); in dwxgmac2_dma_dump_regs()
120 u32 value = readl(ioaddr + XGMAC_MTL_RXQ_OPMODE(channel)); in dwxgmac2_dma_rx_mode()
142 u32 flow = readl(ioaddr + XGMAC_MTL_RXQ_FLOW_CONTROL(channel)); in dwxgmac2_dma_rx_mode()
180 u32 value = readl(ioaddr + XGMAC_MTL_TXQ_OPMODE(channel)); in dwxgmac2_dma_tx_mode()
[all …]
/linux/drivers/media/platform/samsung/s5p-jpeg/
H A Djpeg-hw-s5p.c22 reg = readl(regs + S5P_JPG_SW_RESET); in s5p_jpeg_reset()
26 reg = readl(regs + S5P_JPG_SW_RESET); in s5p_jpeg_reset()
45 reg = readl(regs + S5P_JPGCMOD); in s5p_jpeg_input_raw_mode()
59 reg = readl(regs + S5P_JPGMOD); in s5p_jpeg_proc_mode()
74 reg = readl(regs + S5P_JPGMOD); in s5p_jpeg_subsampling_mode()
82 return readl(regs + S5P_JPGMOD) & S5P_SUBSAMPLING_MODE_MASK; in s5p_jpeg_get_subsampling_mode()
89 reg = readl(regs + S5P_JPGDRI_U); in s5p_jpeg_dri()
94 reg = readl(regs + S5P_JPGDRI_L); in s5p_jpeg_dri()
104 reg = readl(regs + S5P_JPG_QTBL); in s5p_jpeg_qtbl()
114 reg = readl(regs + S5P_JPG_HTBL); in s5p_jpeg_htbl_ac()
[all …]
H A Djpeg-hw-exynos4.c20 reg = readl(base + EXYNOS4_JPEG_CNTL_REG); in exynos4_jpeg_sw_reset()
24 reg = readl(base + EXYNOS4_JPEG_CNTL_REG); in exynos4_jpeg_sw_reset()
36 reg = readl(base + EXYNOS4_JPEG_CNTL_REG); in exynos4_jpeg_set_enc_dec_mode()
67 reg = readl(base + EXYNOS4_IMG_FMT_REG) & in __exynos4_jpeg_set_img_fmt()
141 reg = readl(base + EXYNOS4_IMG_FMT_REG) & in __exynos4_jpeg_set_enc_out_fmt()
174 reg = readl(base + EXYNOS4_INT_EN_REG) & ~EXYNOS4_INT_EN_MASK; in exynos4_jpeg_set_interrupt()
177 reg = readl(base + EXYNOS4_INT_EN_REG) & in exynos4_jpeg_set_interrupt()
185 return readl(base + EXYNOS4_INT_STATUS_REG); in exynos4_jpeg_get_int_status()
192 reg = readl(base + EXYNOS4_JPEG_CNTL_REG) & ~EXYNOS4_HUF_TBL_EN; in exynos4_jpeg_set_huf_table_enable()
206 reg = readl(base + EXYNOS4_JPEG_CNTL_REG) & ~(EXYNOS4_SYS_INT_EN); in exynos4_jpeg_set_sys_int_enable()
[all …]
/linux/drivers/clk/mediatek/
H A Dclk-fhctl.c59 readl(regs->reg_hp_en), readl(regs->reg_clk_con), in dump_hw()
60 readl(regs->reg_slope0), readl(regs->reg_slope1)); in dump_hw()
62 readl(regs->reg_cfg), readl(regs->reg_updnlmt), in dump_hw()
63 readl(regs->reg_dds), readl(regs->reg_dvfs), in dump_hw()
64 readl(regs->reg_mon)); in dump_hw()
65 pr_info("pcw<%x>\n", readl(pll->pcw_addr)); in dump_hw()
73 writel((readl(regs->reg_cfg) & ~(data->frddsx_en)), regs->reg_cfg); in fhctl_set_ssc_regs()
74 writel((readl(regs->reg_cfg) & ~(data->sfstrx_en)), regs->reg_cfg); in fhctl_set_ssc_regs()
75 writel((readl(regs->reg_cfg) & ~(data->fhctlx_en)), regs->reg_cfg); in fhctl_set_ssc_regs()
79 r = readl(regs->reg_cfg); in fhctl_set_ssc_regs()
[all …]
/linux/sound/arm/
H A Dpxa2xx-ac97-lib.c68 val = (readl(reg_addr) & 0xffff); in pxa2xx_ac97_read()
71 if (wait_event_timeout(gsr_wq, (readl(ac97_reg_base + GSR) | gsr_bits) & GSR_SDONE, 1) <= 0 && in pxa2xx_ac97_read()
72 !((readl(ac97_reg_base + GSR) | gsr_bits) & GSR_SDONE)) { in pxa2xx_ac97_read()
74 __func__, reg, readl(ac97_reg_base + GSR) | gsr_bits); in pxa2xx_ac97_read()
81 val = (readl(reg_addr) & 0xffff); in pxa2xx_ac97_read()
83 wait_event_timeout(gsr_wq, (readl(ac97_reg_base + GSR) | gsr_bits) & GSR_SDONE, 1); in pxa2xx_ac97_read()
107 if (wait_event_timeout(gsr_wq, (readl(ac97_reg_base + GSR) | gsr_bits) & GSR_CDONE, 1) <= 0 && in pxa2xx_ac97_write()
108 !((readl(ac97_reg_base + GSR) | gsr_bits) & GSR_CDONE)) { in pxa2xx_ac97_write()
110 __func__, reg, readl(ac97_reg_base + GSR) | gsr_bits); in pxa2xx_ac97_write()
123 writel(readl(ac97_reg_bas in pxa_ac97_warm_pxa25x()
[all...]
/linux/drivers/scsi/bfa/
H A Dbfa_ioc_ct.c60 usecnt = readl(ioc->ioc_regs.ioc_usage_reg); in bfa_ioc_ct_firmware_lock()
67 readl(ioc->ioc_regs.ioc_usage_sem_reg); in bfa_ioc_ct_firmware_lock()
74 ioc_fwstate = readl(ioc->ioc_regs.ioc_fwstate); in bfa_ioc_ct_firmware_lock()
87 readl(ioc->ioc_regs.ioc_usage_sem_reg); in bfa_ioc_ct_firmware_lock()
98 readl(ioc->ioc_regs.ioc_usage_sem_reg); in bfa_ioc_ct_firmware_lock()
113 usecnt = readl(ioc->ioc_regs.ioc_usage_reg); in bfa_ioc_ct_firmware_unlock()
120 readl(ioc->ioc_regs.ioc_usage_sem_reg); in bfa_ioc_ct_firmware_unlock()
134 readl(ioc->ioc_regs.ll_halt); in bfa_ioc_ct_notify_fail()
135 readl(ioc->ioc_regs.alt_ll_halt); in bfa_ioc_ct_notify_fail()
138 readl(ioc->ioc_regs.err_set); in bfa_ioc_ct_notify_fail()
[all …]
/linux/drivers/ata/
H A Dahci_xgene.c93 readl(ctx->csr_diag + CFG_MEM_RAM_SHUTDOWN); /* Force a barrier */ in xgene_ahci_init_memram()
95 if (readl(ctx->csr_diag + BLOCK_MEM_RDY) != 0xFFFFFFFF) { in xgene_ahci_init_memram()
160 fbs = readl(port_mmio + PORT_FBS); in xgene_ahci_restart_engine()
162 fbs = readl(port_mmio + PORT_FBS); in xgene_ahci_restart_engine()
200 port_fbs = readl(port_mmio + PORT_FBS); in xgene_ahci_qc_issue()
223 return (readl(diagcsr + CFG_MEM_RAM_SHUTDOWN) == 0 && in xgene_ahci_is_memram_inited()
224 readl(diagcsr + BLOCK_MEM_RDY) == 0xFFFFFFFF); in xgene_ahci_is_memram_inited()
271 val = readl(mmio + PORTCFG); in xgene_ahci_set_phy_cfg()
274 readl(mmio + PORTCFG); /* Force a barrier */ in xgene_ahci_set_phy_cfg()
277 readl(mmio + PORTPHY1CFG); /* Force a barrier */ in xgene_ahci_set_phy_cfg()
[all …]
H A Dsata_sx4.c468 readl(dimm_mmio); /* MMIO PCI posting flush */ in pdc20621_dma_prep()
502 readl(dimm_mmio); /* MMIO PCI posting flush */ in pdc20621_nodata_prep()
535 readl(mmio + PDC_20621_SEQCTL + (seq * 4)); /* flush */ in __pdc20621_push_hdma()
538 readl(mmio + PDC_HDMA_PKT_SUBMIT); /* flush */ in __pdc20621_push_hdma()
588 readl(dimm_mmio), readl(dimm_mmio + 4), in pdc20621_dump_hdma()
589 readl(dimm_mmio + 8), readl(dimm_mmio + 12)); in pdc20621_dump_hdma()
621 readl(mmio + PDC_20621_SEQCTL + (seq * 4)); /* flush */ in pdc20621_packet_start()
625 readl(ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT); in pdc20621_packet_start()
672 readl(mmio + 0x104), readl(mmio + PDC_HDMA_CTLSTAT)); in pdc20621_host_intr()
683 readl(mmio + 0x104), readl(mmio + PDC_HDMA_CTLSTAT)); in pdc20621_host_intr()
[all …]
/linux/drivers/net/ethernet/samsung/sxgbe/
H A Dsxgbe_core.c26 regval = readl(ioaddr + SXGBE_CORE_TX_CONFIG_REG); in sxgbe_core_init()
34 regval = readl(ioaddr + SXGBE_CORE_RX_CONFIG_REG); in sxgbe_core_init()
54 lpi_status = readl(ioaddr + SXGBE_CORE_LPI_CTRL_STATUS); in sxgbe_get_lpi_status()
74 irq_status = readl(ioaddr + SXGBE_CORE_INT_STATUS_REG); in sxgbe_core_host_irq_status()
106 high_word = readl(ioaddr + SXGBE_CORE_ADD_HIGHOFFSET(reg_n)); in sxgbe_core_get_umac_addr()
107 low_word = readl(ioaddr + SXGBE_CORE_ADD_LOWOFFSET(reg_n)); in sxgbe_core_get_umac_addr()
122 tx_config = readl(ioaddr + SXGBE_CORE_TX_CONFIG_REG); in sxgbe_enable_tx()
134 rx_config = readl(ioaddr + SXGBE_CORE_RX_CONFIG_REG); in sxgbe_enable_rx()
144 return readl(ioaddr + SXGBE_CORE_VERSION_REG); in sxgbe_get_controller_version()
151 return readl(ioaddr + (SXGBE_CORE_HW_FEA_REG(feature_index))); in sxgbe_get_hw_feature()
[all …]
H A Dsxgbe_mtl.c25 reg_val = readl(ioaddr + SXGBE_MTL_OP_MODE_REG); in sxgbe_mtl_init()
68 reg_val = readl(ioaddr + SXGBE_MTL_TXQ_OPMODE_REG(queue_num)); in sxgbe_mtl_set_txfifosize()
80 reg_val = readl(ioaddr + SXGBE_MTL_RXQ_OPMODE_REG(queue_num)); in sxgbe_mtl_set_rxfifosize()
89 reg_val = readl(ioaddr + SXGBE_MTL_TXQ_OPMODE_REG(queue_num)); in sxgbe_mtl_enable_txqueue()
98 reg_val = readl(ioaddr + SXGBE_MTL_TXQ_OPMODE_REG(queue_num)); in sxgbe_mtl_disable_txqueue()
108 reg_val = readl(ioaddr + SXGBE_MTL_RXQ_OPMODE_REG(queue_num)); in sxgbe_mtl_fc_active()
119 reg_val = readl(ioaddr + SXGBE_MTL_RXQ_OPMODE_REG(queue_num)); in sxgbe_mtl_fc_enable()
129 reg_val = readl(ioaddr + SXGBE_MTL_RXQ_OPMODE_REG(queue_num)); in sxgbe_mtl_fc_deactive()
140 reg_val = readl(ioaddr + SXGBE_MTL_RXQ_OPMODE_REG(queue_num)); in sxgbe_mtl_fep_enable()
150 reg_val = readl(ioaddr + SXGBE_MTL_RXQ_OPMODE_REG(queue_num)); in sxgbe_mtl_fep_disable()
[all …]
/linux/drivers/net/ethernet/brocade/bna/
H A Dbfa_ioc_ct.c125 usecnt = readl(ioc->ioc_regs.ioc_usage_reg); in bfa_ioc_ct_firmware_lock()
137 ioc_fwstate = readl(ioc->ioc_regs.ioc_fwstate); in bfa_ioc_ct_firmware_lock()
178 usecnt = readl(ioc->ioc_regs.ioc_usage_reg); in bfa_ioc_ct_firmware_unlock()
194 readl(ioc->ioc_regs.ll_halt); in bfa_ioc_ct_notify_fail()
195 readl(ioc->ioc_regs.alt_ll_halt); in bfa_ioc_ct_notify_fail()
377 r32 = readl(rb + FNC_PERS_REG); in bfa_ioc_ct_map_port()
389 r32 = readl(rb + CT2_HOSTFN_PERSONALITY0); in bfa_ioc_ct2_map_port()
400 r32 = readl(rb + FNC_PERS_REG); in bfa_ioc_ct_isr_mode_set()
427 r32 = readl(ioc->ioc_regs.lpu_read_stat); in bfa_ioc_ct2_lpu_read_stat()
450 r32 = readl(rb + HOSTFN_MSIX_VT_OFST_NUMVT); in bfa_nw_ioc_ct2_poweron()
[all …]
/linux/drivers/net/ethernet/sunplus/
H A Dspl2sw_mac.c26 reg = readl(comm->l2sw_reg_base + L2SW_CPU_CNTL); in spl2sw_mac_hw_stop()
32 reg = readl(comm->l2sw_reg_base + L2SW_PORT_CNTL0); in spl2sw_mac_hw_stop()
42 reg = readl(comm->l2sw_reg_base + L2SW_CPU_CNTL); in spl2sw_mac_hw_start()
48 reg = readl(comm->l2sw_reg_base + L2SW_PORT_CNTL0); in spl2sw_mac_hw_start()
72 ret = read_poll_timeout(readl, reg, reg & MAC_W_MAC_DONE, 1, 200, true, in spl2sw_mac_addr_add()
80 readl(comm->l2sw_reg_base + L2SW_WT_MAC_AD0), in spl2sw_mac_addr_add()
82 readl(comm->l2sw_reg_base + L2SW_W_MAC_47_16)), in spl2sw_mac_addr_add()
84 readl(comm->l2sw_reg_base + L2SW_W_MAC_15_0))); in spl2sw_mac_addr_add()
108 ret = read_poll_timeout(readl, reg, reg & MAC_W_MAC_DONE, 1, 200, true, in spl2sw_mac_addr_del()
116 readl(comm->l2sw_reg_base + L2SW_WT_MAC_AD0), in spl2sw_mac_addr_del()
[all …]
/linux/sound/soc/pxa/
H A Dpxa2xx-i2s.c115 readl(i2s_reg_base + SADR); in pxa_i2s_wait()
177 writel(readl(i2s_reg_base + SACR0) | (SACR0_BCKD), i2s_reg_base + SACR0); in pxa2xx_i2s_hw_params()
179 writel(readl(i2s_reg_base + SACR0) | (SACR0_RFTH(14) | SACR0_TFTH(1)), i2s_reg_base + SACR0); in pxa2xx_i2s_hw_params()
180 writel(readl(i2s_reg_base + SACR1) | (pxa_i2s.fmt), i2s_reg_base + SACR1); in pxa2xx_i2s_hw_params()
183 writel(readl(i2s_reg_base + SAIMR) | (SAIMR_TFS), i2s_reg_base + SAIMR); in pxa2xx_i2s_hw_params()
185 writel(readl(i2s_reg_base + SAIMR) | (SAIMR_RFS), i2s_reg_base + SAIMR); in pxa2xx_i2s_hw_params()
222 writel(readl(i2s_reg_base + SACR1) & (~SACR1_DRPL), i2s_reg_base + SACR1); in pxa2xx_i2s_trigger()
224 writel(readl(i2s_reg_base + SACR1) & (~SACR1_DREC), i2s_reg_base + SACR1); in pxa2xx_i2s_trigger()
225 writel(readl(i2s_reg_base + SACR0) | (SACR0_ENB), i2s_reg_base + SACR0); in pxa2xx_i2s_trigger()
244 writel(readl(i2s_reg_base + SACR1) | (SACR1_DRPL), i2s_reg_base + SACR1); in pxa2xx_i2s_shutdown()
[all …]
/linux/drivers/i2c/busses/
H A Di2c-pxa.c358 readl(_ISR(i2c)), readl(_ICR(i2c)), readl(_IBMR(i2c))); in i2c_pxa_show_state()
373 readl(_IBMR(i2c)), readl(_IDBR(i2c)), readl(_ICR(i2c)), in i2c_pxa_scream_blue_murder()
374 readl(_ISR(i2c))); in i2c_pxa_scream_blue_murder()
396 return !(readl(_ICR(i2c)) & ICR_SCLE); in i2c_pxa_is_slavemode()
408 while ((i > 0) && (readl(_IBMR(i2c)) & IBMR_SDAS) == 0) { in i2c_pxa_abort()
409 unsigned long icr = readl(_ICR(i2c)); in i2c_pxa_abort()
422 writel(readl(_ICR(i2c)) & ~(ICR_MA | ICR_START | ICR_STOP), in i2c_pxa_abort()
432 isr = readl(_ISR(i2c)); in i2c_pxa_wait_bus_not_busy()
458 __func__, (long)jiffies, readl(_ISR(i2c)), readl(_ICR(i2c)), readl(_IBMR(i2c))); in i2c_pxa_wait_master()
460 if (readl(_ISR(i2c)) & ISR_SAD) { in i2c_pxa_wait_master()
[all …]
/linux/drivers/media/platform/samsung/exynos4-is/
H A Dfimc-lite-reg.c25 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); in flite_hw_reset()
30 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); in flite_hw_reset()
42 u32 cfg = readl(dev->regs + FLITE_REG_CISTATUS); in flite_hw_clear_pending_irq()
49 u32 intsrc = readl(dev->regs + FLITE_REG_CISTATUS); in flite_hw_get_interrupt_source()
56 u32 cfg = readl(dev->regs + FLITE_REG_CISTATUS2); in flite_hw_clear_last_capture_end()
77 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); in flite_hw_set_interrupt_mask()
85 u32 cfg = readl(dev->regs + FLITE_REG_CIIMGCPT); in flite_hw_capture_start()
92 u32 cfg = readl(dev->regs + FLITE_REG_CIIMGCPT); in flite_hw_capture_stop()
103 u32 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); in flite_hw_set_test_pattern()
144 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); in flite_hw_set_source_format()
[all …]
/linux/drivers/gpu/drm/bridge/analogix/
H A Danalogix_dp_reg.c32 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
36 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
46 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_stop_video()
200 reg = readl(dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4); in analogix_dp_mute_hpd_interrupt()
204 reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA_MASK); in analogix_dp_mute_hpd_interrupt()
241 reg = readl(dp->reg_base + pd_addr); in analogix_dp_set_pll_power_down()
267 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
276 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
286 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
296 reg = readl(dp->reg_base + phy_pd_addr); in analogix_dp_set_analog_power_down()
[all …]
/linux/drivers/usb/early/
H A Dehci-dbgp.c82 dbgp_printk(" Debug control: %08x", readl(&ehci_debug->control)); in dbgp_ehci_status()
83 dbgp_printk(" ehci cmd : %08x", readl(&ehci_regs->command)); in dbgp_ehci_status()
85 readl(&ehci_regs->configured_flag)); in dbgp_ehci_status()
86 dbgp_printk(" ehci status : %08x", readl(&ehci_regs->status)); in dbgp_ehci_status()
88 readl(&ehci_regs->port_status[dbgp_phys_port - 1])); in dbgp_ehci_status()
203 pids = readl(&ehci_debug->pids); in dbgp_wait_until_done()
257 lo = readl(&ehci_debug->data03); in dbgp_get_data()
258 hi = readl(&ehci_debug->data47); in dbgp_get_data()
277 pids = readl(&ehci_debug->pids); in dbgp_bulk_write()
280 ctrl = readl(&ehci_debug->control); in dbgp_bulk_write()
[all …]
/linux/drivers/usb/chipidea/
H A Dusbmisc_imx.c213 val = readl(usbmisc->base); in usbmisc_imx25_init()
228 val = readl(usbmisc->base); in usbmisc_imx25_init()
265 val = readl(reg); in usbmisc_imx25_post()
301 val = readl(usbmisc->base) | val; in usbmisc_imx27_init()
303 val = readl(usbmisc->base) & ~val; in usbmisc_imx27_init()
321 val = readl(usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET); in usbmisc_imx53_init()
332 val = readl(reg) | MX53_BM_OVER_CUR_DIS_OTG; in usbmisc_imx53_init()
339 val = readl(reg) | MX53_BM_OVER_CUR_DIS_H1; in usbmisc_imx53_init()
347 val = readl(reg) | MX53_USB_CTRL_1_UH2_ULPI_EN; in usbmisc_imx53_init()
354 val = readl(reg) | MX53_USB_UHx_CTRL_WAKE_UP_EN in usbmisc_imx53_init()
[all …]
/linux/sound/soc/sunxi/
H A Dsun8i-adda-pr-regmap.c35 writel(readl(base) | ADDA_PR_RESET, base); in adda_reg_read()
38 writel(readl(base) & ~ADDA_PR_WRITE, base); in adda_reg_read()
41 tmp = readl(base); in adda_reg_read()
47 *val = readl(base) & ADDA_PR_DATA_OUT_MASK; in adda_reg_read()
58 writel(readl(base) | ADDA_PR_RESET, base); in adda_reg_write()
61 tmp = readl(base); in adda_reg_write()
67 tmp = readl(base); in adda_reg_write()
73 writel(readl(base) | ADDA_PR_WRITE, base); in adda_reg_write()
76 writel(readl(base) & ~ADDA_PR_WRITE, base); in adda_reg_write()
/linux/drivers/phy/samsung/
H A Dphy-exynos5-usbdrd.c609 reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYCLKRST); in exynos5_usbdrd_pipe3_set_refclk()
659 reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYCLKRST); in exynos5_usbdrd_utmi_set_refclk()
703 reg = readl(reg_base + tune->off); in exynos5_usbdrd_apply_phy_tunes()
715 reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYPARAM1); in exynos5_usbdrd_pipe3_init()
721 reg = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYTEST); in exynos5_usbdrd_pipe3_init()
733 reg = readl(regs_base + EXYNOS850_DRD_CLKRST); in exynos5_usbdrd_usbdp_g2_v4_ctrl_pma_ready()
737 reg = readl(regs_base + EXYNOS850_DRD_SECPMACTL); in exynos5_usbdrd_usbdp_g2_v4_ctrl_pma_ready()
751 reg = readl(regs_base + EXYNOS850_DRD_SECPMACTL); in exynos5_usbdrd_usbdp_g2_v4_ctrl_pma_ready()
758 reg = readl(regs_base + EXYNOS850_DRD_LINKCTRL); in exynos5_usbdrd_usbdp_g2_v4_ctrl_pma_ready()
765 reg = readl(regs_base + EXYNOS850_DRD_SECPMACTL); in exynos5_usbdrd_usbdp_g2_v4_ctrl_pma_ready()
[all …]
/linux/drivers/cache/
H A Dsifive_ccache.c109 cfg = readl(ccache_base + SIFIVE_CCACHE_CONFIG); in ccache_config_read()
116 cfg = readl(ccache_base + SIFIVE_CCACHE_WAYENABLE); in ccache_config_read()
175 return readl(ccache_base + SIFIVE_CCACHE_WAYENABLE) & 0xFF; in ccache_largest_wayenabled()
211 add_h = readl(ccache_base + SIFIVE_CCACHE_DIRECCFIX_HIGH); in ccache_int_handler()
212 add_l = readl(ccache_base + SIFIVE_CCACHE_DIRECCFIX_LOW); in ccache_int_handler()
215 readl(ccache_base + SIFIVE_CCACHE_DIRECCFIX_COUNT); in ccache_int_handler()
221 add_h = readl(ccache_base + SIFIVE_CCACHE_DIRECCFAIL_HIGH); in ccache_int_handler()
222 add_l = readl(ccache_base + SIFIVE_CCACHE_DIRECCFAIL_LOW); in ccache_int_handler()
224 readl(ccache_base + SIFIVE_CCACHE_DIRECCFAIL_COUNT); in ccache_int_handler()
231 add_h = readl(ccache_base + SIFIVE_CCACHE_DATECCFIX_HIGH); in ccache_int_handler()
[all …]
/linux/drivers/rtc/
H A Drtc-ftrtc010.c70 sec = readl(rtc->rtc_base + FTRTC010_RTC_SECOND); in ftrtc010_rtc_read_time()
71 min = readl(rtc->rtc_base + FTRTC010_RTC_MINUTE); in ftrtc010_rtc_read_time()
72 hour = readl(rtc->rtc_base + FTRTC010_RTC_HOUR); in ftrtc010_rtc_read_time()
73 days = readl(rtc->rtc_base + FTRTC010_RTC_DAYS); in ftrtc010_rtc_read_time()
74 offset = readl(rtc->rtc_base + FTRTC010_RTC_RECORD); in ftrtc010_rtc_read_time()
91 sec = readl(rtc->rtc_base + FTRTC010_RTC_SECOND); in ftrtc010_rtc_set_time()
92 min = readl(rtc->rtc_base + FTRTC010_RTC_MINUTE); in ftrtc010_rtc_set_time()
93 hour = readl(rtc->rtc_base + FTRTC010_RTC_HOUR); in ftrtc010_rtc_set_time()
94 day = readl(rtc->rtc_base + FTRTC010_RTC_DAYS); in ftrtc010_rtc_set_time()
171 sec = readl(rtc->rtc_base + FTRTC010_RTC_SECOND); in ftrtc010_rtc_probe()
[all …]
/linux/sound/soc/ux500/
H A Dux500_msp_i2s.c203 temp_reg = readl(msp->registers + MSP_GCR) & ~TX_CLK_POL_RISING; in configure_protocol()
206 temp_reg = readl(msp->registers + MSP_GCR) & ~RX_CLK_POL_RISING; in configure_protocol()
222 reg_val_GCR = readl(msp->registers + MSP_GCR); in setup_bitclk()
261 reg_val_GCR = readl(msp->registers + MSP_GCR); in setup_bitclk()
291 reg_val_MCR = readl(msp->registers + MSP_MCR); in configure_multichannel()
312 reg_val_MCR = readl(msp->registers + MSP_MCR); in configure_multichannel()
331 reg_val_MCR = readl(msp->registers + MSP_MCR); in configure_multichannel()
363 reg_val_DMACR = readl(msp->registers + MSP_DMACR); in enable_msp()
373 reg_val_GCR = readl(msp->registers + MSP_GCR); in enable_msp()
384 reg_val_GCR = readl(msp->registers + MSP_GCR); in flush_fifo_rx()
[all …]

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