Home
last modified time | relevance | path

Searched refs:ras_comm (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_mmhub.c39 strcpy(ras->ras_block.ras_comm.name, "mmhub"); in amdgpu_mmhub_ras_sw_init()
40 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__MMHUB; in amdgpu_mmhub_ras_sw_init()
41 ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE; in amdgpu_mmhub_ras_sw_init()
42 adev->mmhub.ras_if = &ras->ras_block.ras_comm; in amdgpu_mmhub_ras_sw_init()
H A Damdgpu_nbio.c40 strcpy(ras->ras_block.ras_comm.name, "pcie_bif"); in amdgpu_nbio_ras_sw_init()
41 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__PCIE_BIF; in amdgpu_nbio_ras_sw_init()
42 ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE; in amdgpu_nbio_ras_sw_init()
43 adev->nbio.ras_if = &ras->ras_block.ras_comm; in amdgpu_nbio_ras_sw_init()
H A Damdgpu_hdp.c42 strcpy(ras->ras_block.ras_comm.name, "hdp"); in amdgpu_hdp_ras_sw_init()
43 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__HDP; in amdgpu_hdp_ras_sw_init()
44 ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE; in amdgpu_hdp_ras_sw_init()
45 adev->hdp.ras_if = &ras->ras_block.ras_comm; in amdgpu_hdp_ras_sw_init()
H A Damdgpu_mca.c100 strcpy(ras->ras_block.ras_comm.name, "mca.mp0"); in amdgpu_mca_mp0_ras_sw_init()
101 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__MCA; in amdgpu_mca_mp0_ras_sw_init()
102 ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE; in amdgpu_mca_mp0_ras_sw_init()
103 adev->mca.mp0.ras_if = &ras->ras_block.ras_comm; in amdgpu_mca_mp0_ras_sw_init()
124 strcpy(ras->ras_block.ras_comm.name, "mca.mp1"); in amdgpu_mca_mp1_ras_sw_init()
125 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__MCA; in amdgpu_mca_mp1_ras_sw_init()
126 ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE; in amdgpu_mca_mp1_ras_sw_init()
127 adev->mca.mp1.ras_if = &ras->ras_block.ras_comm; in amdgpu_mca_mp1_ras_sw_init()
148 strcpy(ras->ras_block.ras_comm.name, "mca.mpio"); in amdgpu_mca_mpio_ras_sw_init()
149 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__MCA; in amdgpu_mca_mpio_ras_sw_init()
[all …]
H A Dmca_v3_0.c46 if ((block_obj->ras_comm.block == block) && in mca_v3_0_ras_block_match()
47 (block_obj->ras_comm.sub_block_index == sub_block_index)) { in mca_v3_0_ras_block_match()
H A Damdgpu_sdma.c330 strcpy(ras->ras_block.ras_comm.name, "sdma"); in amdgpu_sdma_ras_sw_init()
331 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__SDMA; in amdgpu_sdma_ras_sw_init()
332 ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE; in amdgpu_sdma_ras_sw_init()
333 adev->sdma.ras_if = &ras->ras_block.ras_comm; in amdgpu_sdma_ras_sw_init()
H A Damdgpu_jpeg.c329 strcpy(ras->ras_block.ras_comm.name, "jpeg"); in amdgpu_jpeg_ras_sw_init()
330 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__JPEG; in amdgpu_jpeg_ras_sw_init()
331 ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__POISON; in amdgpu_jpeg_ras_sw_init()
332 adev->jpeg.ras_if = &ras->ras_block.ras_comm; in amdgpu_jpeg_ras_sw_init()
H A Damdgpu_umc.c340 strcpy(adev->umc.ras->ras_block.ras_comm.name, "umc"); in amdgpu_umc_ras_sw_init()
341 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__UMC; in amdgpu_umc_ras_sw_init()
342 ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE; in amdgpu_umc_ras_sw_init()
343 adev->umc.ras_if = &ras->ras_block.ras_comm; in amdgpu_umc_ras_sw_init()
H A Daldebaran.c384 &tmp_adev->sdma.ras->ras_block.ras_comm); in aldebaran_mode2_restore_hwcontext()
394 &tmp_adev->gfx.ras->ras_block.ras_comm); in aldebaran_mode2_restore_hwcontext()
H A Damdgpu_ras.c1063 if (block_obj->ras_comm.block == block) in amdgpu_ras_block_match_default()
2423 amdgpu_ras_set_err_poison(adev, block_obj->ras_comm.block); in amdgpu_ras_interrupt_poison_consumption_handler()
2433 block_obj->ras_comm.name); in amdgpu_ras_interrupt_poison_consumption_handler()
2451 block_obj->ras_comm.name); in amdgpu_ras_interrupt_poison_consumption_handler()
2634 ras_obj = container_of(head, struct amdgpu_ras_block_object, ras_comm); in amdgpu_ras_interrupt_add_handler()
4484 ras_obj = container_of(ras_block, struct amdgpu_ras_block_object, ras_comm); in amdgpu_ras_block_late_init()
4541 ras_obj = container_of(ras_block, struct amdgpu_ras_block_object, ras_comm); in amdgpu_ras_block_late_fini()
4639 if (!amdgpu_ras_is_supported(adev, obj->ras_comm.block)) in amdgpu_ras_late_init()
4643 r = obj->ras_late_init(adev, &obj->ras_comm); in amdgpu_ras_late_init()
4646 obj->ras_comm.name, r); in amdgpu_ras_late_init()
[all …]
H A Damdgpu_xgmi.c1616 strcpy(ras->ras_block.ras_comm.name, "xgmi_wafl"); in amdgpu_xgmi_ras_sw_init()
1617 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__XGMI_WAFL; in amdgpu_xgmi_ras_sw_init()
1618 ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE; in amdgpu_xgmi_ras_sw_init()
1619 adev->gmc.xgmi.ras_if = &ras->ras_block.ras_comm; in amdgpu_xgmi_ras_sw_init()
H A Dnbio_v7_9.c684 .ras_comm = {
H A Dnbio_v7_4.c660 .ras_comm = {
H A Damdgpu_ras.h760 struct ras_common_if ras_comm; member