| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| H A D | display_rq_dlg_calc_314.h | 65 const bool pstate_en,
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| H A D | display_rq_dlg_calc_314.c | 942 const bool pstate_en, in dml_rq_dlg_get_dlg_params() argument
1050 dml_print("DML_DLG: %s: pstate_en = %d\n", __func__, pstate_en); in dml_rq_dlg_get_dlg_params()
1639 const bool pstate_en, in dml314_rq_dlg_get_dlg_reg() argument
1673 pstate_en, in dml314_rq_dlg_get_dlg_reg()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | display_rq_dlg_calc_20.h | 68 const bool pstate_en,
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| H A D | display_rq_dlg_calc_20v2.h | 68 const bool pstate_en,
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| H A D | display_rq_dlg_calc_20v2.c | 55 const bool pstate_en);
785 const bool pstate_en) in dml20v2_rq_dlg_get_dlg_params() argument
911 dml_print("DML_DLG: %s: pstate_en = %d\n", __func__, pstate_en); in dml20v2_rq_dlg_get_dlg_params()
1083 if (pstate_en) in dml20v2_rq_dlg_get_dlg_params()
1537 const bool pstate_en, in dml20v2_rq_dlg_get_dlg_reg() argument
1576 pstate_en); in dml20v2_rq_dlg_get_dlg_reg()
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| H A D | display_rq_dlg_calc_20.c | 55 const bool pstate_en);
785 const bool pstate_en) in dml20_rq_dlg_get_dlg_params() argument
911 dml_print("DML_DLG: %s: pstate_en = %d\n", __func__, pstate_en); in dml20_rq_dlg_get_dlg_params()
1082 if (pstate_en) in dml20_rq_dlg_get_dlg_params()
1536 const bool pstate_en, in dml20_rq_dlg_get_dlg_reg() argument
1575 pstate_en); in dml20_rq_dlg_get_dlg_reg()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| H A D | display_rq_dlg_calc_31.h | 64 const bool pstate_en,
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| H A D | display_rq_dlg_calc_31.c | 857 const bool pstate_en, in dml_rq_dlg_get_dlg_params() argument
965 dml_print("DML_DLG: %s: pstate_en = %d\n", __func__, pstate_en); in dml_rq_dlg_get_dlg_params()
1551 const bool pstate_en, in dml31_rq_dlg_get_dlg_reg() argument
1585 pstate_en, in dml31_rq_dlg_get_dlg_reg()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| H A D | display_rq_dlg_calc_30.h | 64 const bool pstate_en,
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| H A D | dcn30_fpu.c | 312 …bool pstate_en = context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][maxMpcComb] != dm_dram_clo… in dcn30_fpu_calculate_wm_and_dlg() local
327 if (!pstate_en) { in dcn30_fpu_calculate_wm_and_dlg()
346 …pstate_en = context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][maxMpcComb] != dm_dram_clock_ch… in dcn30_fpu_calculate_wm_and_dlg()
449 if (!pstate_en) { in dcn30_fpu_calculate_wm_and_dlg()
513 if (!pstate_en) in dcn30_fpu_calculate_wm_and_dlg()
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| H A D | display_rq_dlg_calc_30.c | 894 const bool pstate_en, in dml_rq_dlg_get_dlg_params() argument
1025 dml_print("DML_DLG: %s: pstate_en = %d\n", __func__, pstate_en); in dml_rq_dlg_get_dlg_params()
1236 if (pstate_en) in dml_rq_dlg_get_dlg_params()
1733 const bool pstate_en, in dml30_rq_dlg_get_dlg_reg() argument
1772 pstate_en, in dml30_rq_dlg_get_dlg_reg()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| H A D | display_rq_dlg_calc_21.h | 68 const bool pstate_en,
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| H A D | display_rq_dlg_calc_21.c | 831 const bool pstate_en) in dml_rq_dlg_get_dlg_params() argument
957 dml_print("DML_DLG: %s: pstate_en = %d\n", __func__, pstate_en); in dml_rq_dlg_get_dlg_params()
1129 if (pstate_en) in dml_rq_dlg_get_dlg_params()
1645 const bool pstate_en, in dml21_rq_dlg_get_dlg_reg() argument
1688 pstate_en); in dml21_rq_dlg_get_dlg_reg()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | dml1_display_rq_dlg_calc.h | 62 const bool pstate_en,
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| H A D | display_mode_lib.h | 59 const bool pstate_en,
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| H A D | dml1_display_rq_dlg_calc.c | 1004 const bool pstate_en, in dml1_rq_dlg_get_dlg_params() argument
1137 DTRACE("DLG: %s: pstate_en = %d", __func__, pstate_en); in dml1_rq_dlg_get_dlg_params()
1167 if (pstate_en) in dml1_rq_dlg_get_dlg_params()
1305 if (pstate_en) in dml1_rq_dlg_get_dlg_params()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | dcn32_fpu.c | 2312 …bool pstate_en = context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.ma… in dcn32_calculate_wm_and_dlg_fpu() local
2329 if (!pstate_en) { in dcn32_calculate_wm_and_dlg_fpu()
2332 pstate_en = true; in dcn32_calculate_wm_and_dlg_fpu()
2364 if (!pstate_en || (!dc->debug.disable_fpo_optimizations && in dcn32_calculate_wm_and_dlg_fpu()
2365 pstate_en && vlevel != 0)) { in dcn32_calculate_wm_and_dlg_fpu()
2400 pstate_en = true; in dcn32_calculate_wm_and_dlg_fpu()
2556 if ((!pstate_en) && (dc->clk_mgr->bw_params->wm_table.nv_entries[WM_C].valid)) { in dcn32_calculate_wm_and_dlg_fpu()
2623 if (!pstate_en) in dcn32_calculate_wm_and_dlg_fpu()
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