Home
last modified time | relevance | path

Searched refs:polarities (Results 1 – 25 of 27) sorted by relevance

12

/linux/drivers/media/v4l2-core/
H A Dv4l2-dv-timings.c276 t1->bt.polarities == t2->bt.polarities && in v4l2_match_dv_timings()
327 (bt->polarities & V4L2_DV_HSYNC_POS_POL) ? "+" : "-", in v4l2_print_dv_timings()
331 (bt->polarities & V4L2_DV_VSYNC_POS_POL) ? "+" : "-", in v4l2_print_dv_timings()
336 (bt->polarities & V4L2_DV_VSYNC_POS_POL) ? "+" : "-", in v4l2_print_dv_timings()
495 u32 polarities, in v4l2_detect_cvt() argument
510 if (polarities == V4L2_DV_VSYNC_POS_POL) in v4l2_detect_cvt()
512 else if (polarities == V4L2_DV_HSYNC_POS_POL) in v4l2_detect_cvt()
632 t.bt.polarities = polarities; in v4l2_detect_cvt()
718 u32 polarities, in v4l2_detect_gtf() argument
734 if (polarities == V4L2_DV_VSYNC_POS_POL) in v4l2_detect_gtf()
[all …]
/linux/drivers/media/i2c/
H A Dst-mipid02.c334 bool *polarities = ep->bus.mipi_csi2.lane_polarities; in mipid02_configure_clk_lane() local
341 bridge->r.clk_lane_reg1 |= (polarities[0] << 1) | CLK_ENABLE; in mipid02_configure_clk_lane()
347 bool are_lanes_swap, bool *polarities) in mipid02_configure_data0_lane() argument
349 bool are_pin_swap = are_lanes_swap ? polarities[2] : polarities[1]; in mipid02_configure_data0_lane()
366 bool are_lanes_swap, bool *polarities) in mipid02_configure_data1_lane() argument
368 bool are_pin_swap = are_lanes_swap ? polarities[1] : polarities[2]; in mipid02_configure_data1_lane()
385 bool *polarities = ep->bus.mipi_csi2.lane_polarities; in mipid02_configure_from_rx() local
394 polarities); in mipid02_configure_from_rx()
399 polarities); in mipid02_configure_from_rx()
H A Dvgxy61.c1444 int polarities[VGXY61_NB_POLARITIES] = {0, 0, 0, 0, 0}; in vgxy61_tx_from_ep() local
1478 polarities[l] = ep.bus.mipi_csi2.lane_polarities[l]; in vgxy61_tx_from_ep()
1484 sensor->oif_ctrl = (polarities[4] << 15) + ((phy2log[4] - 1) << 13) + in vgxy61_tx_from_ep()
1485 (polarities[3] << 12) + ((phy2log[3] - 1) << 10) + in vgxy61_tx_from_ep()
1486 (polarities[2] << 9) + ((phy2log[2] - 1) << 7) + in vgxy61_tx_from_ep()
1487 (polarities[1] << 6) + ((phy2log[1] - 1) << 4) + in vgxy61_tx_from_ep()
1488 (polarities[0] << 3) + in vgxy61_tx_from_ep()
1496 dev_dbg(&client->dev, "polarity[%d] = %d\n", i, polarities[i]); in vgxy61_tx_from_ep()
H A Dths8200.c336 if (bt->polarities & V4L2_DV_HSYNC_POS_POL) { in ths8200_setup()
340 if (bt->polarities & V4L2_DV_VSYNC_POS_POL) { in ths8200_setup()
H A Dths7303.c299 (int)bt->pixelclock, bt->polarities); in ths7303_log_status()
H A Dov5640.c2582 u8 polarities = 0; in ov5640_set_power_dvp() local
2652 polarities |= BIT(1); in ov5640_set_power_dvp()
2654 polarities |= BIT(0); in ov5640_set_power_dvp()
2657 polarities |= BIT(5); in ov5640_set_power_dvp()
2659 ret = ov5640_write_reg(sensor, OV5640_REG_POLARITY_CTRL00, polarities); in ov5640_set_power_dvp()
H A Dadv7511-v4l2.c1036 ((bt->polarities & V4L2_DV_VSYNC_POS_POL) ? 0 : 0x40) | in adv7511_s_dv_timings()
1037 ((bt->polarities & V4L2_DV_HSYNC_POS_POL) ? 0 : 0x20)); in adv7511_s_dv_timings()
H A Dtda1997x.c1152 timings->bt.polarities = vsync_pos ? V4L2_DV_VSYNC_POS_POL : 0; in tda1997x_detect_std()
1153 timings->bt.polarities |= hsync_pos ? V4L2_DV_HSYNC_POS_POL : 0; in tda1997x_detect_std()
/linux/drivers/gpu/drm/arm/
H A Dhdlcd_crtc.c140 unsigned int polarities, err; in hdlcd_crtc_mode_set_nofb() local
149 polarities = HDLCD_POLARITY_DATAEN | HDLCD_POLARITY_DATA; in hdlcd_crtc_mode_set_nofb()
152 polarities |= HDLCD_POLARITY_HSYNC; in hdlcd_crtc_mode_set_nofb()
154 polarities |= HDLCD_POLARITY_VSYNC; in hdlcd_crtc_mode_set_nofb()
168 hdlcd_write(hdlcd, HDLCD_REG_POLARITIES, polarities); in hdlcd_crtc_mode_set_nofb()
/linux/include/media/
H A Dv4l2-dv-timings.h159 u32 polarities, bool interlaced,
185 unsigned int vsync, u32 polarities, bool interlaced,
/linux/arch/arm64/boot/dts/renesas/
H A Dr8a779a0-falcon-csi-dsi.dtsi134 lane-polarities = <0 0 0 0 1>;
156 lane-polarities = <0 0 0 0 1>;
/linux/arch/arm/boot/dts/ti/omap/
H A Domap3-n9.dts56 lane-polarities = <1 1 1>;
H A Domap3-n950.dts102 lane-polarities = <1 1 1>;
/linux/drivers/net/phy/mediatek/
H A Dmtk-ge-soc.c1288 u32 polarities; in mt7988_phy_led_get_polarity() local
1291 polarities = ~(priv->boottrap); in mt7988_phy_led_get_polarity()
1293 polarities = MTK_PHY_LED1_DEFAULT_POLARITIES; in mt7988_phy_led_get_polarity()
1295 if (polarities & BIT(phydev->mdio.addr)) in mt7988_phy_led_get_polarity()
/linux/Documentation/userspace-api/media/v4l/
H A Ddv-timings.rst21 width and height, signal polarities, frontporches, backporches, sync
H A Dvidioc-g-dv-timings.rst108 - ``polarities``
109 - This is a bit mask that defines polarities of sync signals. bit 0
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mm-phg.dts196 lane-polarities = <1 0 0 0 0>;
/linux/drivers/media/pci/mgb4/
H A Dmgb4_vout.c84 timings->bt.polarities |= V4L2_DV_HSYNC_POS_POL; in get_timings()
86 timings->bt.polarities |= V4L2_DV_VSYNC_POS_POL; in get_timings()
H A Dmgb4_vin.c181 timings->bt.polarities |= V4L2_DV_HSYNC_POS_POL; in get_timings()
183 timings->bt.polarities |= V4L2_DV_VSYNC_POS_POL; in get_timings()
/linux/drivers/media/i2c/adv748x/
H A Dadv748x-hdmi.c327 bt->polarities = (polarity & BIT(4) ? V4L2_DV_VSYNC_POS_POL : 0) | in adv748x_hdmi_query_dv_timings()
/linux/arch/arm/boot/dts/st/
H A Dstm32mp135f-dk.dts308 lane-polarities = <0 0 0>;
/linux/Documentation/iio/
H A Diio_adc.rst33 pseudo-differential) and two possible polarities (unipolar, bipolar). The input
/linux/Documentation/networking/pse-pd/
H A Dpse-pi.rst59 different polarities, known as variant X and variant S, to accommodate
/linux/drivers/media/test-drivers/vivid/
H A Dvivid-vid-cap.c1468 bt->polarities, bt->interlaced, in valid_cvt_gtf_timings()
1484 bt->polarities, bt->interlaced, in valid_cvt_gtf_timings()
/linux/include/uapi/linux/
H A Dvideodev2.h1560 * @polarities: Positive or negative polarities
1595 __u32 polarities;
1594 __u32 polarities; global() member

12