Searched refs:pm_display_cfg (Results 1 – 8 of 8) sorted by relevance
46 memset(&adev->pm.pm_display_cfg, 0, in dm_pp_apply_display_requirements()47 sizeof(adev->pm.pm_display_cfg)); in dm_pp_apply_display_requirements()49 adev->pm.pm_display_cfg.cpu_cc6_disable = in dm_pp_apply_display_requirements()52 adev->pm.pm_display_cfg.cpu_pstate_disable = in dm_pp_apply_display_requirements()55 adev->pm.pm_display_cfg.cpu_pstate_separation_time = in dm_pp_apply_display_requirements()58 adev->pm.pm_display_cfg.nb_pstate_switch_disable = in dm_pp_apply_display_requirements()61 adev->pm.pm_display_cfg.num_display = in dm_pp_apply_display_requirements()63 adev->pm.pm_display_cfg.num_path_including_non_display = in dm_pp_apply_display_requirements()66 adev->pm.pm_display_cfg.min_core_set_clock = in dm_pp_apply_display_requirements()68 adev->pm.pm_display_cfg.min_core_set_clock_in_sr = in dm_pp_apply_display_requirements()[all …]
33 struct amd_pp_display_configuration *cfg = &adev->pm.pm_display_cfg; in amdgpu_dpm_get_display_cfg()53 display_cfg = &adev->pm.pm_display_cfg.displays[num_crtcs++]; in amdgpu_dpm_get_display_cfg()
357 struct amd_pp_display_configuration pm_display_cfg;/* set by dc */ member
60 hwmgr->display_config = &adev->pm.pm_display_cfg; in amd_powerplay_create()1545 &adev->pm.pm_display_cfg); in pp_pm_compute_clocks()
3075 u32 vblank_time = adev->pm.pm_display_cfg.min_vblank_time; in si_dpm_vblank_too_short()3442 &adev->pm.pm_display_cfg; in si_apply_state_adjust_rules()3530 if ((adev->pm.pm_display_cfg.num_display > 1) || in si_apply_state_adjust_rules()4203 const struct amd_pp_display_configuration *cfg = &adev->pm.pm_display_cfg; in si_program_display_gap()5543 (adev->pm.pm_display_cfg.num_display <= 2)) { in si_convert_power_level_to_smc()5692 if (adev->pm.pm_display_cfg.display_clk <= in si_is_state_ulv_compatible()5846 const struct amd_pp_display_configuration *cfg = &adev->pm.pm_display_cfg; in si_upload_smc_data()
773 bool single_display = adev->pm.pm_display_cfg.num_display < 2; in amdgpu_dpm_pick_power_state()
2302 pi->video_start || (adev->pm.pm_display_cfg.num_display >= 3) || in kv_apply_state_adjust_rules()2361 (adev->pm.pm_display_cfg.num_display >= 3) || pi->video_start); in kv_calculate_nbps_level_settings()
1373 smu->display_config = &adev->pm.pm_display_cfg; in smu_sw_init()