Searched refs:pllCLK_PIN_CNTL (Results 1 – 2 of 2) sorted by relevance
269 tmp = INPLL(pllCLK_PIN_CNTL); in radeon_pm_disable_dynamic_mode() 271 OUTPLL(pllCLK_PIN_CNTL, tmp); in radeon_pm_disable_dynamic_mode() 460 tmp = INPLL(pllCLK_PIN_CNTL); in radeon_pm_enable_dynamic_mode() 462 OUTPLL(pllCLK_PIN_CNTL, tmp); in radeon_pm_enable_dynamic_mode() 946 clk_pin_cntl = INPLL( pllCLK_PIN_CNTL); in radeon_pm_setup_for_suspend() 979 OUTPLL( pllCLK_PIN_CNTL, clk_pin_cntl); in radeon_pm_setup_for_suspend() 1033 clk_pin_cntl = INPLL( pllCLK_PIN_CNTL); in radeon_pm_setup_for_suspend() 1046 OUTPLL( pllCLK_PIN_CNTL, clk_pin_cntl); in radeon_pm_setup_for_suspend() 1802 OUTPLL(pllCLK_PIN_CNTL, rinfo->save_regs[4]); in radeon_reinitialize_M10() 2042 OUTPLL(pllCLK_PIN_CNTL, rinf in radeon_reinitialize_M9P() [all...]
1011 // pllCLK_PIN_CNTL1897 #define pllCLK_PIN_CNTL 0x0001 macro