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Searched refs:pipe_mode (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
H A Dskl_prefill.c22 const struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode; in prefill_usecs_to_lines() local
24 return DIV_ROUND_UP_ULL(mul_u32_u32(pipe_mode->crtc_clock, usecs << 16), in prefill_usecs_to_lines()
25 pipe_mode->crtc_htotal * 1000); in prefill_usecs_to_lines()
H A Dintel_display.c2191 u32 pixel_rate = crtc_state->hw.pipe_mode.crtc_clock; in ilk_pipe_pixel_rate()
2238 crtc_state->hw.pipe_mode.crtc_clock; in intel_crtc_compute_pixel_rate()
2288 struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode; in intel_crtc_readout_derived_state() local
2295 drm_mode_copy(pipe_mode, adjusted_mode); in intel_crtc_readout_derived_state()
2298 intel_splitter_adjust_timings(crtc_state, pipe_mode); in intel_crtc_readout_derived_state()
2305 intel_mode_from_crtc_timings(adjusted_mode, pipe_mode); in intel_crtc_readout_derived_state()
2308 drm_mode_copy(mode, pipe_mode); in intel_crtc_readout_derived_state()
2315 intel_joiner_adjust_timings(crtc_state, pipe_mode); in intel_crtc_readout_derived_state()
2316 intel_mode_from_crtc_timings(pipe_mode, pipe_mode); in intel_crtc_readout_derived_state()
2382 struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode; in intel_crtc_compute_pipe_mode() local
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H A Dskl_scaler.c271 const struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode; in skl_update_scaler_crtc() local
278 width = pipe_mode->crtc_hdisplay; in skl_update_scaler_crtc()
279 height = pipe_mode->crtc_vdisplay; in skl_update_scaler_crtc()
1093 crtc_state->hw.pipe_mode.crtc_clock)); in _skl_scaler_max_scale()
H A Dskl_watermark.c318 if (crtc_state->hw.pipe_mode.flags & DRM_MODE_FLAG_INTERLACE) in skl_crtc_can_enable_sagv()
473 const struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode; in intel_crtc_ddb_weight() local
484 drm_mode_get_hv_timing(pipe_mode, &hdisplay, &vdisplay); in intel_crtc_ddb_weight()
1652 return DIV_ROUND_UP(crtc_state->hw.pipe_mode.crtc_htotal * 1000, in skl_wm_linetime_us()
1816 crtc_state->hw.pipe_mode.crtc_htotal, in skl_compute_plane_wm()
1825 if ((wp->cpp * crtc_state->hw.pipe_mode.crtc_htotal / in skl_compute_plane_wm()
2164 const struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode; in skl_wm0_prefill_lines_worst() local
2186 pipe_mode->crtc_clock), in skl_wm0_prefill_lines_worst()
2191 pipe_mode->crtc_hdisplay), in skl_wm0_prefill_lines_worst()
H A Dintel_vrr.c546 struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode; in intel_vrr_compute_guardband() local
566 pipe_mode->crtc_vblank_start = in intel_vrr_compute_guardband()
H A Dintel_cdclk.c4233 int clock = crtc_state->hw.pipe_mode.crtc_clock; in intel_cdclk_prefill_adjustment_worst()
4257 const struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode; in intel_cdclk_min_cdclk_for_prefill() local
4260 return DIV_ROUND_UP_ULL(mul_u32_u32(pipe_mode->crtc_clock, prefill_lines_unadjusted), in intel_cdclk_min_cdclk_for_prefill()
H A Dintel_display_types.h1037 struct drm_display_mode mode, pipe_mode, adjusted_mode; member
/linux/include/linux/
H A Dhyperv.h325 u32 pipe_mode; member