| /linux/arch/arm/mach-s3c/ |
| H A D | setup-usb-phy-s3c64xx.c | 26 u32 phyclk; in s3c_usb_otgphy_init() local
31 phyclk = readl(S3C_PHYCLK) & ~S3C_PHYCLK_CLKSEL_MASK; in s3c_usb_otgphy_init()
37 phyclk |= S3C_PHYCLK_CLKSEL_12M; in s3c_usb_otgphy_init()
40 phyclk |= S3C_PHYCLK_CLKSEL_24M; in s3c_usb_otgphy_init()
51 writel(phyclk | S3C_PHYCLK_CLK_FORCE, S3C_PHYCLK); in s3c_usb_otgphy_init()
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| /linux/drivers/phy/samsung/ |
| H A D | phy-exynos5250-sata.c | 50 struct clk *phyclk; member
196 sata_phy->phyclk = devm_clk_get(dev, "sata_phyctrl"); in exynos_sata_phy_probe()
197 if (IS_ERR(sata_phy->phyclk)) { in exynos_sata_phy_probe()
199 ret = PTR_ERR(sata_phy->phyclk); in exynos_sata_phy_probe()
203 ret = clk_prepare_enable(sata_phy->phyclk); in exynos_sata_phy_probe()
228 clk_disable_unprepare(sata_phy->phyclk); in exynos_sata_phy_probe()
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| /linux/drivers/net/wireless/ath/ath10k/ |
| H A D | hw.c | 602 u32 phyclk; in ath10k_hw_qca988x_set_coverage_class() local
627 phyclk = MS(phyclk_reg, WAVE1_PHYCLK_USEC) + 1; in ath10k_hw_qca988x_set_coverage_class()
653 if (slottime_reg % phyclk) { in ath10k_hw_qca988x_set_coverage_class()
661 slottime = slottime / phyclk; in ath10k_hw_qca988x_set_coverage_class()
675 slottime += value * 3 * phyclk; in ath10k_hw_qca988x_set_coverage_class()
682 ack_timeout += 3 * value * phyclk; in ath10k_hw_qca988x_set_coverage_class()
688 cts_timeout += 3 * value * phyclk; in ath10k_hw_qca988x_set_coverage_class()
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| /linux/drivers/phy/freescale/ |
| H A D | phy-fsl-samsung-hdmi.c | 615 struct clk *phyclk; in phy_clk_register() local
628 phyclk = devm_clk_register(dev, &phy->hw); in phy_clk_register()
629 if (IS_ERR(phyclk)) in phy_clk_register()
630 return dev_err_probe(dev, PTR_ERR(phyclk), in phy_clk_register()
633 ret = of_clk_add_hw_provider(np, of_clk_hw_simple_get, phyclk); in phy_clk_register()
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| /linux/drivers/phy/rockchip/ |
| H A D | phy-rockchip-inno-hdmi.c | 245 struct clk *phyclk; member
638 ret = clk_prepare_enable(inno->phyclk); in inno_hdmi_phy_power_on()
644 clk_disable_unprepare(inno->phyclk); in inno_hdmi_phy_power_on()
660 clk_disable_unprepare(inno->phyclk); in inno_hdmi_phy_power_off()
1019 inno->phyclk = devm_clk_register(dev, &inno->hw); in inno_hdmi_phy_clk_register()
1020 if (IS_ERR(inno->phyclk)) { in inno_hdmi_phy_clk_register()
1021 ret = PTR_ERR(inno->phyclk); in inno_hdmi_phy_clk_register()
1026 ret = of_clk_add_provider(np, of_clk_src_simple_get, inno->phyclk); in inno_hdmi_phy_clk_register()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_mcg/ |
| H A D | dml2_mcg_dcn4.c | 183 …min_table->max_clocks_khz.phyclk = soc_bb->clk_table.phyclk.clk_values_khz[soc_bb->clk_table.phycl… in build_min_clock_table()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/ |
| H A D | dml_top_soc_parameter_types.h | 130 struct dml2_clk_table phyclk; member
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/bounding_boxes/ |
| H A D | dcn4_soc_bb.h | 109 .phyclk = {
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| /linux/Documentation/devicetree/bindings/net/ |
| H A D | sti-dwmac.txt | 20 - st,ext-phyclk: valid only for RMII where PHY can generate 50MHz clock or
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| /linux/Documentation/devicetree/bindings/clock/st/ |
| H A D | st,flexgen.txt | 125 "clk-eth-ref-phyclk",
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| /linux/arch/arm/boot/dts/st/ |
| H A D | stm32mp135f-dhcor-dhsbc.dts | 85 st,ext-phyclk;
134 st,ext-phyclk;
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| H A D | stih407-pinctrl.dtsi | 218 phyclk = <&pio2 3 ALT4 OUT NICLK 1250 CLK_B>;
260 phyclk = <&pio2 3 ALT1 OUT NICLK 0 CLK_A>;
281 phyclk = <&pio2 3 ALT1 OUT NICLK 0 CLK_A>;
287 phyclk = <&pio2 3 ALT2 IN NICLK 0 CLK_A>;
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| /linux/arch/arm/boot/dts/rockchip/ |
| H A D | rk3188.dtsi | 657 clock-names = "phyclk";
665 clock-names = "phyclk";
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| H A D | rk3066a.dtsi | 715 clock-names = "phyclk";
723 clock-names = "phyclk";
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| H A D | rk322x.dtsi | 259 clock-names = "phyclk";
286 clock-names = "phyclk";
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| H A D | rk3288.dtsi | 908 clock-names = "phyclk";
918 clock-names = "phyclk";
928 clock-names = "phyclk";
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| H A D | rk3036.dtsi | 353 clock-names = "phyclk";
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| H A D | rv1108.dtsi | 265 clock-names = "phyclk";
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| /linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/ |
| H A D | main.h | 366 bool phyclk; /* phy is out of reset and has clock */ member
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/inc/ |
| H A D | dml2_internal_shared_types.h | 36 unsigned int phyclk; member
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| /linux/arch/arm64/boot/dts/st/ |
| H A D | stm32mp257f-ev1.dts | 216 st,ext-phyclk;
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| /linux/arch/arm64/boot/dts/exynos/ |
| H A D | exynos5433.dtsi | 1770 clock-names = "aclk", "susp_clk", "phyclk", "pipe_pclk";
1823 clock-names = "aclk", "susp_clk", "phyclk", "pipe_pclk";
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| /linux/arch/arm64/boot/dts/rockchip/ |
| H A D | rk3588-extra.dtsi | 96 clock-names = "phyclk";
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| H A D | rk356x-base.dtsi | 1811 clock-names = "phyclk";
1833 clock-names = "phyclk";
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_dpmm/ |
| H A D | dml2_dpmm_dcn4.c | 422 …phyclk_khz, &display_cfg->stream_programming[i].min_clocks.dcn4x.phyclk_khz, &state_table->phyclk); in map_min_clocks_to_dpm()
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