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Searched refs:otx2_write64 (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/net/ethernet/marvell/octeontx2/nic/
H A Dcn20k.c26 otx2_write64(pf, RVU_PF_INT, pf_trig_val); in cn20k_pfaf_mbox_intr_handler()
66 otx2_write64(vf, RVU_VF_INT, vf_trig_val); in cn20k_vfaf_mbox_intr_handler()
105 otx2_write64(pf, RVU_MBOX_PF_VFPF_INTX(0), ~0ull); in cn20k_enable_pfvf_mbox_intr()
106 otx2_write64(pf, RVU_MBOX_PF_VFPF_INTX(1), ~0ull); in cn20k_enable_pfvf_mbox_intr()
107 otx2_write64(pf, RVU_MBOX_PF_VFPF1_INTX(0), ~0ull); in cn20k_enable_pfvf_mbox_intr()
108 otx2_write64(pf, RVU_MBOX_PF_VFPF1_INTX(1), ~0ull); in cn20k_enable_pfvf_mbox_intr()
111 otx2_write64(pf, RVU_MBOX_PF_VFPF_INT_ENA_W1SX(0), INTR_MASK(numvfs)); in cn20k_enable_pfvf_mbox_intr()
112 otx2_write64(pf, RVU_MBOX_PF_VFPF1_INT_ENA_W1SX(0), INTR_MASK(numvfs)); in cn20k_enable_pfvf_mbox_intr()
115 otx2_write64(pf, RVU_MBOX_PF_VFPF_INT_ENA_W1SX(1), in cn20k_enable_pfvf_mbox_intr()
117 otx2_write64(pf, RVU_MBOX_PF_VFPF1_INT_ENA_W1SX(1), in cn20k_enable_pfvf_mbox_intr()
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H A Dotx2_pf.c85 otx2_write64(pf, RVU_PF_VFME_INT_ENA_W1CX(0), INTR_MASK(vfs)); in otx2_disable_flr_me_intr()
90 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(vfs)); in otx2_disable_flr_me_intr()
97 otx2_write64(pf, RVU_PF_VFME_INT_ENA_W1CX(1), INTR_MASK(vfs - 64)); in otx2_disable_flr_me_intr()
101 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1CX(1), INTR_MASK(vfs - 64)); in otx2_disable_flr_me_intr()
140 otx2_write64(pf, RVU_PF_VFTRPENDX(reg), BIT_ULL(vf)); in otx2_flr_handler()
141 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1SX(reg), BIT_ULL(vf)); in otx2_flr_handler()
167 otx2_write64(pf, RVU_PF_VFFLR_INTX(reg), BIT_ULL(vf)); in otx2_pf_flr_intr_handler()
169 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1CX(reg), in otx2_pf_flr_intr_handler()
193 otx2_write64(pf, RVU_PF_VFTRPENDX(reg), BIT_ULL(vf)); in otx2_pf_me_intr_handler()
195 otx2_write64(pf, RVU_PF_VFME_INTX(reg), BIT_ULL(vf)); in otx2_pf_me_intr_handler()
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H A Dotx2_vf.c193 otx2_write64(vf, RVU_VF_INT, BIT_ULL(0)); in otx2vf_vfaf_mbox_intr_handler()
202 otx2_write64(vf, RVU_VF_VFPF_MBOX0, mbox_data); in otx2vf_vfaf_mbox_intr_handler()
219 otx2_write64(vf, RVU_VF_VFPF_MBOX0, mbox_data); in otx2vf_vfaf_mbox_intr_handler()
242 otx2_write64(vf, RVU_VF_INT_ENA_W1C, BIT_ULL(0)); in otx2vf_disable_mbox_intr()
245 otx2_write64(vf, RVU_VF_INT_ENA_W1C, BIT_ULL(0) | BIT_ULL(1)); in otx2vf_disable_mbox_intr()
281 otx2_write64(vf, RVU_VF_INT, BIT_ULL(0)); in otx2vf_register_mbox_intr()
282 otx2_write64(vf, RVU_VF_INT_ENA_W1S, BIT_ULL(0)); in otx2vf_register_mbox_intr()
284 otx2_write64(vf, RVU_VF_INT, BIT_ULL(0) | BIT_ULL(1) | in otx2vf_register_mbox_intr()
286 otx2_write64(vf, RVU_VF_INT_ENA_W1S, BIT_ULL(0) | in otx2vf_register_mbox_intr()
H A Dcn10k_ipsec.c148 otx2_write64(pf, CN10K_CPT_LF_INPROG, reg_val); in cn10k_outb_cptlf_iq_enable()
153 otx2_write64(pf, CN10K_CPT_LF_CTL, reg_val); in cn10k_outb_cptlf_iq_enable()
165 otx2_write64(pf, CN10K_CPT_LF_CTL, 0ull); in cn10k_outb_cptlf_iq_disable()
187 otx2_write64(pf, CN10K_CPT_LF_INPROG, reg_val); in cn10k_outb_cptlf_iq_disable()
281 otx2_write64(pf, CN10K_CPT_LF_Q_BASE, pf->ipsec.iq.dma_addr); in cn10k_outb_cptlf_iq_init()
286 otx2_write64(pf, CN10K_CPT_LF_Q_SIZE, reg_val); in cn10k_outb_cptlf_iq_init()
365 otx2_write64(pf, CN10K_CPT_LF_Q_BASE, 0); in cn10k_outb_cpt_clean()
366 otx2_write64(pf, CN10K_CPT_LF_Q_SIZE, 0); in cn10k_outb_cpt_clean()
485 otx2_write64(pf, CN10K_CPT_LF_CTX_FLUSH, reg_val); in cn10k_outb_write_sa()
H A Dotx2_xsk.c187 otx2_write64(pf, NIX_LF_CINTX_ENA_W1S(cq_poll->cint_idx), BIT_ULL(0)); in otx2_xsk_wakeup()
188 otx2_write64(pf, NIX_LF_CINTX_INT_W1S(cq_poll->cint_idx), BIT_ULL(0)); in otx2_xsk_wakeup()
H A Dotx2_txrx.c430 otx2_write64(pfvf, NIX_LF_CQ_OP_DOOR, in otx2_rx_napi_handler()
512 otx2_write64(pfvf, NIX_LF_CQ_OP_DOOR, in otx2_tx_napi_handler()
598 otx2_write64(pfvf, NIX_LF_CINTX_INT(cq_poll->cint_idx), BIT_ULL(0)); in otx2_napi_handler()
635 otx2_write64(pfvf, in otx2_napi_handler()
1314 otx2_write64(pfvf, NIX_LF_CQ_OP_DOOR, in otx2_cleanup_rx_cqes()
1360 otx2_write64(pfvf, NIX_LF_CQ_OP_DOOR, in otx2_cleanup_tx_cqes()
H A Drep.c547 otx2_write64(priv, NIX_LF_CINTX_INT(qidx), BIT_ULL(0)); in rvu_rep_napi_init()
548 otx2_write64(priv, NIX_LF_CINTX_ENA_W1S(qidx), BIT_ULL(0)); in rvu_rep_napi_init()
569 otx2_write64(priv, NIX_LF_CINTX_ENA_W1C(qidx), BIT_ULL(0)); in rvu_rep_free_cq_rsrc()
H A Dotx2_common.c382 otx2_write64(pfvf, NIX_LF_RX_SECRETX(5), in otx2_set_rss_key()
387 otx2_write64(pfvf, NIX_LF_RX_SECRETX(idx), *key++); in otx2_set_rss_key()
525 otx2_write64(pfvf, NIX_LF_CINTX_WAIT(qidx), in otx2_config_irq_coalescing()
H A Dotx2_common.h689 static inline void otx2_write64(struct otx2_nic *nic, u64 offset, u64 val) in otx2_write64() function