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Searched refs:osc_parents (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/clk/sophgo/
H A Dclk-sg2044-pll.c434 static const struct clk_parent_data osc_parents[] = { variable
465 static DEFINE_SG2044_PLL_RO(CLK_FPLL0, clk_fpll0, osc_parents, CLK_IS_CRITICAL,
469 static DEFINE_SG2044_PLL_RO(CLK_FPLL1, clk_fpll1, osc_parents, CLK_IS_CRITICAL,
473 static DEFINE_SG2044_PLL_RO(CLK_FPLL2, clk_fpll2, osc_parents, CLK_IS_CRITICAL,
477 static DEFINE_SG2044_PLL_RO(CLK_DPLL0, clk_dpll0, osc_parents, CLK_IS_CRITICAL,
481 static DEFINE_SG2044_PLL_RO(CLK_DPLL1, clk_dpll1, osc_parents, CLK_IS_CRITICAL,
485 static DEFINE_SG2044_PLL_RO(CLK_DPLL2, clk_dpll2, osc_parents, CLK_IS_CRITICAL,
489 static DEFINE_SG2044_PLL_RO(CLK_DPLL3, clk_dpll3, osc_parents, CLK_IS_CRITICAL,
493 static DEFINE_SG2044_PLL_RO(CLK_DPLL4, clk_dpll4, osc_parents, CLK_IS_CRITICAL,
497 static DEFINE_SG2044_PLL_RO(CLK_DPLL5, clk_dpll5, osc_parents, CLK_IS_CRITICAL,
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H A Dclk-cv1800.c35 static const struct clk_parent_data osc_parents[] = { variable
56 static CV1800_INTEGRAL_PLL(clk_fpll, osc_parents,
63 static CV1800_INTEGRAL_PLL(clk_mipimpll, osc_parents,
237 static CV1800_GATE(clk_xtal_misc, osc_parents,
258 static CV1800_DIV(clk_1m, osc_parents,
303 static CV1800_GATE(clk_rtc_25m, osc_parents,
313 static CV1800_GATE(clk_tempsen, osc_parents,
318 static CV1800_GATE(clk_saradc, osc_parents,
323 static CV1800_GATE(clk_efuse, osc_parents,
326 static CV1800_GATE(clk_apb_efuse, osc_parents,
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