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Searched refs:octeon_read_csr64 (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/net/ethernet/cavium/liquidio/
H A Dcn23xx_pf_device.c55 if (octeon_read_csr64(oct, CN23XX_SLI_SCRATCH1)) { in cn23xx_pf_soft_reset()
146 octeon_read_csr64(oct, CN23XX_SLI_PKT_MAC_RINFO64(mac_no, pf_num)); in cn23xx_setup_global_mac_regs()
172 mac_no, pf_num, (u64)octeon_read_csr64 in cn23xx_setup_global_mac_regs()
192 d64 = octeon_read_csr64(oct, CN23XX_SLI_IQ_PKT_CONTROL64(q_no)); in cn23xx_reset_io_queues()
199 u64 reg_val = octeon_read_csr64(oct, in cn23xx_reset_io_queues()
204 WRITE_ONCE(reg_val, octeon_read_csr64( in cn23xx_reset_io_queues()
218 WRITE_ONCE(reg_val, octeon_read_csr64( in cn23xx_reset_io_queues()
285 octeon_read_csr64(oct, CN23XX_SLI_IQ_PKT_CONTROL64(q_no)); in cn23xx_pf_setup_global_input_regs()
631 reg_val = octeon_read_csr64( in cn23xx_enable_io_queues()
643 reg_val = octeon_read_csr64( in cn23xx_enable_io_queues()
[all …]
H A Dcn23xx_vf_device.c59 d64 = octeon_read_csr64(oct, in cn23xx_vf_reset_io_queues()
68 u64 reg_val = octeon_read_csr64(oct, in cn23xx_vf_reset_io_queues()
73 WRITE_ONCE(reg_val, octeon_read_csr64( in cn23xx_vf_reset_io_queues()
88 WRITE_ONCE(reg_val, octeon_read_csr64( in cn23xx_vf_reset_io_queues()
124 d64 = octeon_read_csr64(oct, in cn23xx_vf_setup_global_input_regs()
325 reg_val = octeon_read_csr64( in cn23xx_enable_vf_io_queues()
334 reg_val = octeon_read_csr64( in cn23xx_enable_vf_io_queues()
569 ((octeon_read_csr64( in cn23xx_enable_vf_interrupt()
580 (octeon_read_csr64(oct, CN23XX_VF_SLI_PKT_MBOX_INT(0)) | in cn23xx_enable_vf_interrupt()
601 (octeon_read_csr64( in cn23xx_disable_vf_interrupt()
[all …]
H A Dlio_ethtool.c527 reg_val = octeon_read_csr64(oct, ctrl); in lio_ethtool_get_channels()
637 reg_val = octeon_read_csr64(oct, ctrl); in lio_ethtool_set_channels()
2263 (octeon_read_csr64( in oct_cfg_rx_intrcnt()
2284 (octeon_read_csr64( in oct_cfg_rx_intrcnt()
2557 (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2564 (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2571 (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2576 (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2583 oct->pcie_port, oct->pf_num, (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2591 (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
[all …]
H A Dcn68xx_device.c73 pktctl = octeon_read_csr64(oct, CN6XXX_SLI_PKT_CTL); in lio_cn68xx_setup_pkt_ctl_regs()
77 tx_pipe = octeon_read_csr64(oct, CN68XX_SLI_TX_PIPE); in lio_cn68xx_setup_pkt_ctl_regs()
H A Dcn66xx_device.c44 if (octeon_read_csr64(oct, CN6XXX_SLI_SCRATCH1)) { in lio_cn6xxx_soft_reset()
112 r64 = octeon_read_csr64(oct, CN6XXX_SLI_S2M_PORTX_CTL(oct->pcie_port)); in lio_cn6xxx_setup_pcie_mrrs()
176 pktctl = octeon_read_csr64(oct, CN6XXX_SLI_PKT_CTL); in lio_cn66xx_setup_pkt_ctl_regs()
H A Docteon_device.c969 u64 reg_val = octeon_read_csr64( in octeon_set_io_queues_off()
975 reg_val = octeon_read_csr64( in octeon_set_io_queues_off()
991 reg_val = octeon_read_csr64( in octeon_set_io_queues_off()
H A Docteon_device.h742 #define octeon_read_csr64(oct_dev, reg_off) \ macro
H A Dlio_main.c766 (u16)octeon_read_csr64(oct, CN23XX_SLI_SCRATCH2); in liquidio_watchdog()