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Searched refs:oct (Results 1 – 25 of 62) sorted by relevance

123

/linux/drivers/net/ethernet/cavium/liquidio/
H A Dcn66xx_device.c29 int lio_cn6xxx_soft_reset(struct octeon_device *oct) in lio_cn6xxx_soft_reset() argument
31 octeon_write_csr64(oct, CN6XXX_WIN_WR_MASK_REG, 0xFF); in lio_cn6xxx_soft_reset()
33 dev_dbg(&oct->pci_dev->dev, "BIST enabled for soft reset\n"); in lio_cn6xxx_soft_reset()
35 lio_pci_writeq(oct, 1, CN6XXX_CIU_SOFT_BIST); in lio_cn6xxx_soft_reset()
36 octeon_write_csr64(oct, CN6XXX_SLI_SCRATCH1, 0x1234ULL); in lio_cn6xxx_soft_reset()
38 lio_pci_readq(oct, CN6XXX_CIU_SOFT_RST); in lio_cn6xxx_soft_reset()
39 lio_pci_writeq(oct, 1, CN6XXX_CIU_SOFT_RST); in lio_cn6xxx_soft_reset()
44 if (octeon_read_csr64(oct, CN6XXX_SLI_SCRATCH1)) { in lio_cn6xxx_soft_reset()
45 dev_err(&oct->pci_dev->dev, "Soft reset failed\n"); in lio_cn6xxx_soft_reset()
49 dev_dbg(&oct->pci_dev->dev, "Reset completed\n"); in lio_cn6xxx_soft_reset()
[all …]
H A Dcn23xx_pf_device.c39 static int cn23xx_pf_soft_reset(struct octeon_device *oct) in cn23xx_pf_soft_reset() argument
41 octeon_write_csr64(oct, CN23XX_WIN_WR_MASK_REG, 0xFF); in cn23xx_pf_soft_reset()
43 dev_dbg(&oct->pci_dev->dev, "OCTEON[%d]: BIST enabled for CN23XX soft reset\n", in cn23xx_pf_soft_reset()
44 oct->octeon_id); in cn23xx_pf_soft_reset()
46 octeon_write_csr64(oct, CN23XX_SLI_SCRATCH1, 0x1234ULL); in cn23xx_pf_soft_reset()
49 lio_pci_readq(oct, CN23XX_RST_SOFT_RST); in cn23xx_pf_soft_reset()
50 lio_pci_writeq(oct, 1, CN23XX_RST_SOFT_RST); in cn23xx_pf_soft_reset()
55 if (octeon_read_csr64(oct, CN23XX_SLI_SCRATCH1)) { in cn23xx_pf_soft_reset()
56 dev_err(&oct->pci_dev->dev, "OCTEON[%d]: Soft reset failed\n", in cn23xx_pf_soft_reset()
57 oct->octeon_id); in cn23xx_pf_soft_reset()
[all …]
H A Dcn68xx_device.c31 static void lio_cn68xx_set_dpi_regs(struct octeon_device *oct) in lio_cn68xx_set_dpi_regs() argument
36 lio_pci_writeq(oct, CN6XXX_DPI_DMA_CTL_MASK, CN6XXX_DPI_DMA_CONTROL); in lio_cn68xx_set_dpi_regs()
37 dev_dbg(&oct->pci_dev->dev, "DPI_DMA_CONTROL: 0x%016llx\n", in lio_cn68xx_set_dpi_regs()
38 lio_pci_readq(oct, CN6XXX_DPI_DMA_CONTROL)); in lio_cn68xx_set_dpi_regs()
45 lio_pci_writeq(oct, 0, CN6XXX_DPI_DMA_ENG_ENB(i)); in lio_cn68xx_set_dpi_regs()
46 lio_pci_writeq(oct, fifo_sizes[i], CN6XXX_DPI_DMA_ENG_BUF(i)); in lio_cn68xx_set_dpi_regs()
47 dev_dbg(&oct->pci_dev->dev, "DPI_ENG_BUF%d: 0x%016llx\n", i, in lio_cn68xx_set_dpi_regs()
48 lio_pci_readq(oct, CN6XXX_DPI_DMA_ENG_BUF(i))); in lio_cn68xx_set_dpi_regs()
55 lio_pci_writeq(oct, 1, CN6XXX_DPI_CTL); in lio_cn68xx_set_dpi_regs()
56 dev_dbg(&oct->pci_dev->dev, "DPI_CTL: 0x%016llx\n", in lio_cn68xx_set_dpi_regs()
[all …]
H A Docteon_device.c569 static void *__retrieve_octeon_config_info(struct octeon_device *oct, in __retrieve_octeon_config_info() argument
572 u32 oct_id = oct->octeon_id; in __retrieve_octeon_config_info()
577 if (oct->chip_id == OCTEON_CN66XX) { in __retrieve_octeon_config_info()
579 } else if ((oct->chip_id == OCTEON_CN68XX) && in __retrieve_octeon_config_info()
582 } else if ((oct->chip_id == OCTEON_CN68XX) && in __retrieve_octeon_config_info()
585 } else if (oct->chip_id == OCTEON_CN23XX_PF_VID) { in __retrieve_octeon_config_info()
587 } else if (oct->chip_id == OCTEON_CN23XX_VF_VID) { in __retrieve_octeon_config_info()
597 static int __verify_octeon_config_info(struct octeon_device *oct, void *conf) in __verify_octeon_config_info() argument
599 switch (oct->chip_id) { in __verify_octeon_config_info()
602 return lio_validate_cn6xxx_config_info(oct, conf); in __verify_octeon_config_info()
[all …]
H A Dcn23xx_vf_device.c30 u32 cn23xx_vf_get_oq_ticks(struct octeon_device *oct, u32 time_intr_in_us) in cn23xx_vf_get_oq_ticks() argument
33 u32 oqticks_per_us = (u32)oct->pfvf_hsword.coproc_tics_per_us; in cn23xx_vf_get_oq_ticks()
50 static int cn23xx_vf_reset_io_queues(struct octeon_device *oct, u32 num_queues) in cn23xx_vf_reset_io_queues() argument
59 d64 = octeon_read_csr64(oct, in cn23xx_vf_reset_io_queues()
62 octeon_write_csr64(oct, CN23XX_VF_SLI_IQ_PKT_CONTROL64(q_no), in cn23xx_vf_reset_io_queues()
68 u64 reg_val = octeon_read_csr64(oct, in cn23xx_vf_reset_io_queues()
74 oct, CN23XX_VF_SLI_IQ_PKT_CONTROL64(q_no))); in cn23xx_vf_reset_io_queues()
78 dev_err(&oct->pci_dev->dev, in cn23xx_vf_reset_io_queues()
85 octeon_write_csr64(oct, CN23XX_VF_SLI_IQ_PKT_CONTROL64(q_no), in cn23xx_vf_reset_io_queues()
89 oct, CN23XX_VF_SLI_IQ_PKT_CONTROL64(q_no))); in cn23xx_vf_reset_io_queues()
[all …]
H A Docteon_console.c35 static u64 cvmx_bootmem_phy_named_block_find(struct octeon_device *oct,
38 static int octeon_console_read(struct octeon_device *oct, u32 console_num,
147 static inline u64 __cvmx_bootmem_desc_get(struct octeon_device *oct, in __cvmx_bootmem_desc_get() argument
155 return octeon_read_device_mem32(oct, base); in __cvmx_bootmem_desc_get()
157 return octeon_read_device_mem64(oct, base); in __cvmx_bootmem_desc_get()
173 static void CVMX_BOOTMEM_NAMED_GET_NAME(struct octeon_device *oct, in CVMX_BOOTMEM_NAMED_GET_NAME() argument
179 octeon_pci_read_core_mem(oct, addr, (u8 *)str, len); in CVMX_BOOTMEM_NAMED_GET_NAME()
195 static int __cvmx_bootmem_check_version(struct octeon_device *oct, in __cvmx_bootmem_check_version() argument
201 if (!oct->bootmem_desc_addr) in __cvmx_bootmem_check_version()
202 oct->bootmem_desc_addr = in __cvmx_bootmem_check_version()
[all …]
H A Drequest_manager.c39 static void __check_db_timeout(struct octeon_device *oct, u64 iq_no);
47 int octeon_init_instr_queue(struct octeon_device *oct, in octeon_init_instr_queue() argument
56 int numa_node = dev_to_node(&oct->pci_dev->dev); in octeon_init_instr_queue()
58 if (OCTEON_CN6XXX(oct)) in octeon_init_instr_queue()
59 conf = &(CFG_GET_IQ_CFG(CHIP_CONF(oct, cn6xxx))); in octeon_init_instr_queue()
60 else if (OCTEON_CN23XX_PF(oct)) in octeon_init_instr_queue()
61 conf = &(CFG_GET_IQ_CFG(CHIP_CONF(oct, cn23xx_pf))); in octeon_init_instr_queue()
62 else if (OCTEON_CN23XX_VF(oct)) in octeon_init_instr_queue()
63 conf = &(CFG_GET_IQ_CFG(CHIP_CONF(oct, cn23xx_vf))); in octeon_init_instr_queue()
66 dev_err(&oct->pci_dev->dev, "Unsupported Chip %x\n", in octeon_init_instr_queue()
[all …]
H A Dlio_vf_main.c70 static int octeon_device_init(struct octeon_device *oct);
73 static int lio_wait_for_oq_pkts(struct octeon_device *oct) in lio_wait_for_oq_pkts() argument
75 struct octeon_device_priv *oct_priv = oct->priv; in lio_wait_for_oq_pkts()
83 for (i = 0; i < MAX_OCTEON_OUTPUT_QUEUES(oct); i++) { in lio_wait_for_oq_pkts()
84 if (!(oct->io_qmask.oq & BIT_ULL(i))) in lio_wait_for_oq_pkts()
86 pkt_cnt += octeon_droq_check_hw_for_pkts(oct->droq[i]); in lio_wait_for_oq_pkts()
104 static void pcierror_quiesce_device(struct octeon_device *oct) in pcierror_quiesce_device() argument
116 if (wait_for_pending_requests(oct)) in pcierror_quiesce_device()
117 dev_err(&oct->pci_dev->dev, "There were pending requests\n"); in pcierror_quiesce_device()
120 for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) { in pcierror_quiesce_device()
[all …]
H A Dlio_main.c139 static int octeon_dbg_console_print(struct octeon_device *oct, u32 console_num,
159 struct octeon_device *oct = oct_priv->dev; in octeon_droq_bh() local
161 for (q_no = 0; q_no < MAX_OCTEON_OUTPUT_QUEUES(oct); q_no++) { in octeon_droq_bh()
162 if (!(oct->io_qmask.oq & BIT_ULL(q_no))) in octeon_droq_bh()
164 reschedule |= octeon_droq_process_packets(oct, oct->droq[q_no], in octeon_droq_bh()
166 lio_enable_irq(oct->droq[q_no], NULL); in octeon_droq_bh()
168 if (OCTEON_CN23XX_PF(oct) && oct->msix_on) { in octeon_droq_bh()
172 int adjusted_q_no = q_no + oct->sriov_info.pf_srn; in octeon_droq_bh()
175 oct, CN23XX_SLI_OQ_PKT_INT_LEVELS(adjusted_q_no), in octeon_droq_bh()
178 oct, CN23XX_SLI_OQ_PKTS_SENT(adjusted_q_no), 0); in octeon_droq_bh()
[all …]
H A Dlio_vf_rep.c55 lio_vf_rep_send_soft_command(struct octeon_device *oct, in lio_vf_rep_send_soft_command() argument
66 octeon_alloc_soft_command(oct, req_size, in lio_vf_rep_send_soft_command()
82 octeon_prepare_soft_command(oct, sc, OPCODE_NIC, in lio_vf_rep_send_soft_command()
85 err = octeon_send_soft_command(oct, sc); in lio_vf_rep_send_soft_command()
89 err = wait_for_sc_completion_timeout(oct, sc, 0); in lio_vf_rep_send_soft_command()
95 dev_err(&oct->pci_dev->dev, "VF rep send config failed\n"); in lio_vf_rep_send_soft_command()
103 octeon_free_soft_command(oct, sc); in lio_vf_rep_send_soft_command()
113 struct octeon_device *oct; in lio_vf_rep_open() local
116 oct = vf_rep->oct; in lio_vf_rep_open()
123 ret = lio_vf_rep_send_soft_command(oct, &rep_cfg, in lio_vf_rep_open()
[all …]
H A Docteon_mem_ops.c31 octeon_toggle_bar1_swapmode(struct octeon_device *oct, u32 idx) in octeon_toggle_bar1_swapmode() argument
35 mask = oct->fn_list.bar1_idx_read(oct, idx); in octeon_toggle_bar1_swapmode()
37 oct->fn_list.bar1_idx_write(oct, idx, mask); in octeon_toggle_bar1_swapmode()
40 #define octeon_toggle_bar1_swapmode(oct, idx) argument
44 octeon_pci_fastwrite(struct octeon_device *oct, u8 __iomem *mapped_addr, in octeon_pci_fastwrite() argument
52 octeon_toggle_bar1_swapmode(oct, MEMOPS_IDX); in octeon_pci_fastwrite()
61 octeon_toggle_bar1_swapmode(oct, MEMOPS_IDX); in octeon_pci_fastwrite()
68 octeon_pci_fastread(struct octeon_device *oct, u8 __iomem *mapped_addr, in octeon_pci_fastread() argument
76 octeon_toggle_bar1_swapmode(oct, MEMOPS_IDX); in octeon_pci_fastread()
85 octeon_toggle_bar1_swapmode(oct, MEMOPS_IDX); in octeon_pci_fastread()
[all …]
H A Dlio_core.c86 int lio_setup_glists(struct octeon_device *oct, struct lio *lio, int num_iqs) in lio_setup_glists() argument
119 int numa_node = dev_to_node(&oct->pci_dev->dev); in lio_setup_glists()
126 lio_dma_alloc(oct, in lio_setup_glists()
165 struct octeon_device *oct = lio->oct_dev; in liquidio_set_feature() local
180 dev_err(&oct->pci_dev->dev, "Feature change failed in core (ret: 0x%x)\n", in liquidio_set_feature()
261 struct octeon_device *oct = lio->oct_dev; in liquidio_link_ctrl_cmd_completion() local
302 dev_info(&oct->pci_dev->dev, "%s LRO Enabled\n", netdev->name); in liquidio_link_ctrl_cmd_completion()
306 dev_info(&oct->pci_dev->dev, "%s LRO Disabled\n", in liquidio_link_ctrl_cmd_completion()
311 dev_info(&oct->pci_dev->dev, "%s Firmware debug enabled\n", in liquidio_link_ctrl_cmd_completion()
316 dev_info(&oct->pci_dev->dev, "%s Firmware debug disabled\n", in liquidio_link_ctrl_cmd_completion()
[all …]
H A Dlio_ethtool.c219 struct octeon_device *oct = lio->oct_dev; in lio_get_link_ksettings() local
247 dev_dbg(&oct->pci_dev->dev, "ecmd->base.transceiver is XCVR_EXTERNAL\n"); in lio_get_link_ksettings()
250 dev_err(&oct->pci_dev->dev, "Unknown link interface mode: %d\n", in lio_get_link_ksettings()
260 if (oct->subsystem_id == OCTEON_CN2350_25GB_SUBSYS_ID || in lio_get_link_ksettings()
261 oct->subsystem_id == OCTEON_CN2360_25GB_SUBSYS_ID) { in lio_get_link_ksettings()
262 if (OCTEON_CN23XX_PF(oct)) { in lio_get_link_ksettings()
270 if (oct->no_speed_setting == 0) { in lio_get_link_ksettings()
282 if (oct->no_speed_setting == 0) { in lio_get_link_ksettings()
286 oct->speed_setting = 25; in lio_get_link_ksettings()
289 if (oct->speed_setting == 10) { in lio_get_link_ksettings()
[all …]
H A Docteon_droq.c136 octeon_droq_destroy_ring_buffers(struct octeon_device *oct, in octeon_droq_destroy_ring_buffers() argument
148 lio_unmap_ring(oct->pci_dev, in octeon_droq_destroy_ring_buffers()
163 octeon_droq_setup_ring_buffers(struct octeon_device *oct, in octeon_droq_setup_ring_buffers() argument
171 buf = recv_buffer_alloc(oct, &droq->recv_buf_list[i].pg_info); in octeon_droq_setup_ring_buffers()
174 dev_err(&oct->pci_dev->dev, "%s buffer alloc failed\n", in octeon_droq_setup_ring_buffers()
194 int octeon_delete_droq(struct octeon_device *oct, u32 q_no) in octeon_delete_droq() argument
196 struct octeon_droq *droq = oct->droq[q_no]; in octeon_delete_droq()
198 dev_dbg(&oct->pci_dev->dev, "%s[%d]\n", __func__, q_no); in octeon_delete_droq()
200 octeon_droq_destroy_ring_buffers(oct, droq); in octeon_delete_droq()
204 lio_dma_free(oct, (droq->max_count * OCT_DROQ_DESC_SIZE), in octeon_delete_droq()
[all …]
H A Dcn66xx_device.h68 int lio_cn6xxx_soft_reset(struct octeon_device *oct);
69 void lio_cn6xxx_enable_error_reporting(struct octeon_device *oct);
70 void lio_cn6xxx_setup_pcie_mps(struct octeon_device *oct,
72 void lio_cn6xxx_setup_pcie_mrrs(struct octeon_device *oct,
74 void lio_cn6xxx_setup_global_input_regs(struct octeon_device *oct);
75 void lio_cn6xxx_setup_global_output_regs(struct octeon_device *oct);
76 void lio_cn6xxx_setup_iq_regs(struct octeon_device *oct, u32 iq_no);
77 void lio_cn6xxx_setup_oq_regs(struct octeon_device *oct, u32 oq_no);
78 int lio_cn6xxx_enable_io_queues(struct octeon_device *oct);
79 void lio_cn6xxx_disable_io_queues(struct octeon_device *oct);
[all …]
H A Docteon_main.h73 void octeon_pf_changed_vf_macaddr(struct octeon_device *oct, u8 *mac);
75 void octeon_schedule_rxq_oom_work(struct octeon_device *oct,
93 static inline void octeon_unmap_pci_barx(struct octeon_device *oct, int baridx) in octeon_unmap_pci_barx() argument
95 dev_dbg(&oct->pci_dev->dev, "Freeing PCI mapped regions for Bar%d\n", in octeon_unmap_pci_barx()
98 if (oct->mmio[baridx].done) in octeon_unmap_pci_barx()
99 iounmap(oct->mmio[baridx].hw_addr); in octeon_unmap_pci_barx()
101 if (oct->mmio[baridx].start) in octeon_unmap_pci_barx()
102 pci_release_region(oct->pci_dev, baridx * 2); in octeon_unmap_pci_barx()
111 static inline int octeon_map_pci_barx(struct octeon_device *oct, in octeon_map_pci_barx() argument
116 if (pci_request_region(oct->pci_dev, baridx * 2, DRV_NAME)) { in octeon_map_pci_barx()
[all …]
/linux/drivers/net/ethernet/marvell/octeon_ep/
H A Doctep_cn9k_pf.c40 static void cn93_dump_regs(struct octep_device *oct, int qno) in cn93_dump_regs() argument
42 struct device *dev = &oct->pdev->dev; in cn93_dump_regs()
47 octep_read_csr64(oct, CN93_SDP_R_IN_INSTR_DBELL(qno))); in cn93_dump_regs()
50 octep_read_csr64(oct, CN93_SDP_R_IN_CONTROL(qno))); in cn93_dump_regs()
53 octep_read_csr64(oct, CN93_SDP_R_IN_ENABLE(qno))); in cn93_dump_regs()
56 octep_read_csr64(oct, CN93_SDP_R_IN_INSTR_BADDR(qno))); in cn93_dump_regs()
59 octep_read_csr64(oct, CN93_SDP_R_IN_INSTR_RSIZE(qno))); in cn93_dump_regs()
62 octep_read_csr64(oct, CN93_SDP_R_IN_CNTS(qno))); in cn93_dump_regs()
65 octep_read_csr64(oct, CN93_SDP_R_IN_INT_LEVELS(qno))); in cn93_dump_regs()
68 octep_read_csr64(oct, CN93_SDP_R_IN_PKT_CNT(qno))); in cn93_dump_regs()
[all …]
H A Doctep_cnxk_pf.c61 static void cnxk_dump_regs(struct octep_device *oct, int qno) in cnxk_dump_regs() argument
63 struct device *dev = &oct->pdev->dev; in cnxk_dump_regs()
68 octep_read_csr64(oct, CNXK_SDP_R_IN_INSTR_DBELL(qno))); in cnxk_dump_regs()
71 octep_read_csr64(oct, CNXK_SDP_R_IN_CONTROL(qno))); in cnxk_dump_regs()
74 octep_read_csr64(oct, CNXK_SDP_R_IN_ENABLE(qno))); in cnxk_dump_regs()
77 octep_read_csr64(oct, CNXK_SDP_R_IN_INSTR_BADDR(qno))); in cnxk_dump_regs()
80 octep_read_csr64(oct, CNXK_SDP_R_IN_INSTR_RSIZE(qno))); in cnxk_dump_regs()
83 octep_read_csr64(oct, CNXK_SDP_R_IN_CNTS(qno))); in cnxk_dump_regs()
86 octep_read_csr64(oct, CNXK_SDP_R_IN_INT_LEVELS(qno))); in cnxk_dump_regs()
89 octep_read_csr64(oct, CNXK_SDP_R_IN_PKT_CNT(qno))); in cnxk_dump_regs()
[all …]
H A Doctep_main.c54 static int octep_alloc_ioq_vectors(struct octep_device *oct) in octep_alloc_ioq_vectors() argument
59 for (i = 0; i < oct->num_oqs; i++) { in octep_alloc_ioq_vectors()
60 oct->ioq_vector[i] = vzalloc(sizeof(*oct->ioq_vector[i])); in octep_alloc_ioq_vectors()
61 if (!oct->ioq_vector[i]) in octep_alloc_ioq_vectors()
64 ioq_vector = oct->ioq_vector[i]; in octep_alloc_ioq_vectors()
65 ioq_vector->iq = oct->iq[i]; in octep_alloc_ioq_vectors()
66 ioq_vector->oq = oct->oq[i]; in octep_alloc_ioq_vectors()
67 ioq_vector->octep_dev = oct; in octep_alloc_ioq_vectors()
70 dev_info(&oct->pdev->dev, "Allocated %d IOQ vectors\n", oct->num_oqs); in octep_alloc_ioq_vectors()
76 vfree(oct->ioq_vector[i]); in octep_alloc_ioq_vectors()
[all …]
H A Doctep_pfvf_mbox.c34 static void octep_pfvf_validate_version(struct octep_device *oct, u32 vf_id, in octep_pfvf_validate_version() argument
40 dev_dbg(&oct->pdev->dev, "VF id:%d VF version:%d PF version:%d\n", in octep_pfvf_validate_version()
47 oct->vf_info[vf_id].mbox_version = rsp->s_version.version; in octep_pfvf_validate_version()
48 dev_dbg(&oct->pdev->dev, "VF id:%d negotiated VF version:%d\n", in octep_pfvf_validate_version()
49 vf_id, oct->vf_info[vf_id].mbox_version); in octep_pfvf_validate_version()
54 static void octep_pfvf_get_link_status(struct octep_device *oct, u32 vf_id, in octep_pfvf_get_link_status() argument
60 status = octep_ctrl_net_get_link_status(oct, vf_id); in octep_pfvf_get_link_status()
63 dev_err(&oct->pdev->dev, "Get VF link status failed via host control Mbox\n"); in octep_pfvf_get_link_status()
70 static void octep_pfvf_set_link_status(struct octep_device *oct, u32 vf_id, in octep_pfvf_set_link_status() argument
76 err = octep_ctrl_net_set_link_status(oct, vf_id, cmd.s_link_status.status, true); in octep_pfvf_set_link_status()
[all …]
H A Doctep_main.h79 void (*setup_iq_regs)(struct octep_device *oct, int q);
80 int (*setup_oq_regs)(struct octep_device *oct, int q);
81 void (*setup_mbox_regs)(struct octep_device *oct, int mbox);
95 int (*soft_reset)(struct octep_device *oct);
96 void (*reinit_regs)(struct octep_device *oct);
99 void (*enable_interrupts)(struct octep_device *oct);
100 void (*disable_interrupts)(struct octep_device *oct);
101 void (*poll_non_ioq_interrupts)(struct octep_device *oct);
103 void (*enable_io_queues)(struct octep_device *oct);
104 void (*disable_io_queues)(struct octep_device *oct);
[all …]
/linux/drivers/net/ethernet/marvell/octeon_ep_vf/
H A Doctep_vf_cnxk.c17 static void cnxk_vf_dump_q_regs(struct octep_vf_device *oct, int qno) in cnxk_vf_dump_q_regs() argument
19 struct device *dev = &oct->pdev->dev; in cnxk_vf_dump_q_regs()
24 octep_vf_read_csr64(oct, CNXK_VF_SDP_R_IN_INSTR_DBELL(qno))); in cnxk_vf_dump_q_regs()
27 octep_vf_read_csr64(oct, CNXK_VF_SDP_R_IN_CONTROL(qno))); in cnxk_vf_dump_q_regs()
30 octep_vf_read_csr64(oct, CNXK_VF_SDP_R_IN_ENABLE(qno))); in cnxk_vf_dump_q_regs()
33 octep_vf_read_csr64(oct, CNXK_VF_SDP_R_IN_INSTR_BADDR(qno))); in cnxk_vf_dump_q_regs()
36 octep_vf_read_csr64(oct, CNXK_VF_SDP_R_IN_INSTR_RSIZE(qno))); in cnxk_vf_dump_q_regs()
39 octep_vf_read_csr64(oct, CNXK_VF_SDP_R_IN_CNTS(qno))); in cnxk_vf_dump_q_regs()
42 octep_vf_read_csr64(oct, CNXK_VF_SDP_R_IN_INT_LEVELS(qno))); in cnxk_vf_dump_q_regs()
45 octep_vf_read_csr64(oct, CNXK_VF_SDP_R_IN_PKT_CNT(qno))); in cnxk_vf_dump_q_regs()
[all …]
H A Doctep_vf_cn9k.c17 static void cn93_vf_dump_q_regs(struct octep_vf_device *oct, int qno) in cn93_vf_dump_q_regs() argument
19 struct device *dev = &oct->pdev->dev; in cn93_vf_dump_q_regs()
24 octep_vf_read_csr64(oct, CN93_VF_SDP_R_IN_INSTR_DBELL(qno))); in cn93_vf_dump_q_regs()
27 octep_vf_read_csr64(oct, CN93_VF_SDP_R_IN_CONTROL(qno))); in cn93_vf_dump_q_regs()
30 octep_vf_read_csr64(oct, CN93_VF_SDP_R_IN_ENABLE(qno))); in cn93_vf_dump_q_regs()
33 octep_vf_read_csr64(oct, CN93_VF_SDP_R_IN_INSTR_BADDR(qno))); in cn93_vf_dump_q_regs()
36 octep_vf_read_csr64(oct, CN93_VF_SDP_R_IN_INSTR_RSIZE(qno))); in cn93_vf_dump_q_regs()
39 octep_vf_read_csr64(oct, CN93_VF_SDP_R_IN_CNTS(qno))); in cn93_vf_dump_q_regs()
42 octep_vf_read_csr64(oct, CN93_VF_SDP_R_IN_INT_LEVELS(qno))); in cn93_vf_dump_q_regs()
45 octep_vf_read_csr64(oct, CN93_VF_SDP_R_IN_PKT_CNT(qno))); in cn93_vf_dump_q_regs()
[all …]
H A Doctep_vf_main.c51 static int octep_vf_alloc_ioq_vectors(struct octep_vf_device *oct) in octep_vf_alloc_ioq_vectors() argument
56 for (i = 0; i < oct->num_oqs; i++) { in octep_vf_alloc_ioq_vectors()
57 oct->ioq_vector[i] = vzalloc(sizeof(*oct->ioq_vector[i])); in octep_vf_alloc_ioq_vectors()
58 if (!oct->ioq_vector[i]) in octep_vf_alloc_ioq_vectors()
61 ioq_vector = oct->ioq_vector[i]; in octep_vf_alloc_ioq_vectors()
62 ioq_vector->iq = oct->iq[i]; in octep_vf_alloc_ioq_vectors()
63 ioq_vector->oq = oct->oq[i]; in octep_vf_alloc_ioq_vectors()
64 ioq_vector->octep_vf_dev = oct; in octep_vf_alloc_ioq_vectors()
67 dev_info(&oct->pdev->dev, "Allocated %d IOQ vectors\n", oct->num_oqs); in octep_vf_alloc_ioq_vectors()
73 vfree(oct->ioq_vector[i]); in octep_vf_alloc_ioq_vectors()
[all …]
H A Doctep_vf_mbox.c23 int octep_vf_setup_mbox(struct octep_vf_device *oct) in octep_vf_setup_mbox() argument
27 oct->mbox = vzalloc(sizeof(*oct->mbox)); in octep_vf_setup_mbox()
28 if (!oct->mbox) in octep_vf_setup_mbox()
31 mutex_init(&oct->mbox->lock); in octep_vf_setup_mbox()
33 oct->hw_ops.setup_mbox_regs(oct, ring); in octep_vf_setup_mbox()
34 INIT_WORK(&oct->mbox->wk.work, octep_vf_mbox_work); in octep_vf_setup_mbox()
35 oct->mbox->wk.ctxptr = oct; in octep_vf_setup_mbox()
36 oct->mbox_neg_ver = OCTEP_PFVF_MBOX_VERSION_CURRENT; in octep_vf_setup_mbox()
37 dev_info(&oct->pdev->dev, "setup vf mbox successfully\n"); in octep_vf_setup_mbox()
41 void octep_vf_delete_mbox(struct octep_vf_device *oct) in octep_vf_delete_mbox() argument
[all …]

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