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Searched refs:nvkm_clk (Results 1 – 25 of 28) sorted by relevance

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/linux/drivers/gpu/drm/nouveau/include/nvkm/subdev/
H A Dclk.h82 struct nvkm_clk { struct
115 int (*pll_calc)(struct nvkm_clk *, struct nvbios_pll *, int clk, argument
117 int (*pll_prog)(struct nvkm_clk *, u32 reg1, struct nvkm_pll_vals *pv); argument
120 int nvkm_clk_read(struct nvkm_clk *, enum nv_clk_src);
121 int nvkm_clk_ustate(struct nvkm_clk *, int req, int pwr);
122 int nvkm_clk_astate(struct nvkm_clk *, int req, int rel, bool wait);
123 int nvkm_clk_dstate(struct nvkm_clk *, int req, int rel);
124 int nvkm_clk_tstate(struct nvkm_clk *, u8 temperature);
127 int nv04_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);
128 int nv40_clk_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_clk **);
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/linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dpriv.h4 #define nvkm_clk(p) container_of((p), struct nvkm_clk, subdev) macro
8 int (*init)(struct nvkm_clk *);
9 void (*fini)(struct nvkm_clk *);
10 int (*read)(struct nvkm_clk *, enum nv_clk_src);
11 int (*calc)(struct nvkm_clk *, struct nvkm_cstate *);
12 int (*prog)(struct nvkm_clk *);
13 void (*tidy)(struct nvkm_clk *);
20 bool allow_reclock, struct nvkm_clk *);
22 bool allow_reclock, struct nvkm_clk **);
24 int nv04_clk_pll_calc(struct nvkm_clk *, struct nvbios_pll *, int clk,
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H A Dnv50.h19 struct nvkm_clk base;
24 bool, struct nvkm_clk **);
25 int nv50_clk_read(struct nvkm_clk *, enum nv_clk_src);
26 int nv50_clk_calc(struct nvkm_clk *, struct nvkm_cstate *);
27 int nv50_clk_prog(struct nvkm_clk *);
28 void nv50_clk_tidy(struct nvkm_clk *);
H A Dbase.c41 nvkm_clk_adjust(struct nvkm_clk *clk, bool adjust, in nvkm_clk_adjust()
79 nvkm_cstate_valid(struct nvkm_clk *clk, struct nvkm_cstate *cstate, in nvkm_cstate_valid()
112 nvkm_cstate_find_best(struct nvkm_clk *clk, struct nvkm_pstate *pstate, in nvkm_cstate_find_best()
145 nvkm_cstate_get(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei) in nvkm_cstate_get()
160 nvkm_cstate_prog(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei) in nvkm_cstate_prog()
225 nvkm_cstate_new(struct nvkm_clk *clk, int idx, struct nvkm_pstate *pstate) in nvkm_cstate_new()
267 nvkm_pstate_prog(struct nvkm_clk *clk, int pstatei) in nvkm_pstate_prog()
302 struct nvkm_clk *clk = container_of(work, typeof(*clk), work); in nvkm_pstate_work()
336 nvkm_pstate_calc(struct nvkm_clk *clk, bool wait) in nvkm_pstate_calc()
346 nvkm_pstate_info(struct nvkm_clk *clk, struct nvkm_pstate *pstate) in nvkm_pstate_info()
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H A Dgk20a.h117 struct nvkm_clk base;
152 void gk20a_clk_fini(struct nvkm_clk *);
153 int gk20a_clk_read(struct nvkm_clk *, enum nv_clk_src);
154 int gk20a_clk_calc(struct nvkm_clk *, struct nvkm_cstate *);
155 int gk20a_clk_prog(struct nvkm_clk *);
156 void gk20a_clk_tidy(struct nvkm_clk *);
H A Dgp10b.c13 gp10b_clk_init(struct nvkm_clk *base) in gp10b_clk_init()
35 gp10b_clk_read(struct nvkm_clk *base, enum nv_clk_src src) in gp10b_clk_read()
50 gp10b_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate) in gp10b_clk_calc()
61 gp10b_clk_prog(struct nvkm_clk *base) in gp10b_clk_prog()
161 struct nvkm_clk **pclk) in gp10b_clk_new()
H A Dgt215.h16 int gt215_pll_info(struct nvkm_clk *, int, u32, u32, struct gt215_clk_info *);
17 int gt215_clk_pre(struct nvkm_clk *, unsigned long *flags);
18 void gt215_clk_post(struct nvkm_clk *, unsigned long *flags);
H A Dnv40.c32 struct nvkm_clk base;
97 nv40_clk_read(struct nvkm_clk *base, enum nv_clk_src src) in nv40_clk_read()
146 nv40_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate) in nv40_clk_calc()
186 nv40_clk_prog(struct nvkm_clk *base) in nv40_clk_prog()
200 nv40_clk_tidy(struct nvkm_clk *obj) in nv40_clk_tidy()
222 struct nvkm_clk **pclk) in nv40_clk_new()
H A Dgt215.c35 struct nvkm_clk base;
143 gt215_clk_read(struct nvkm_clk *base, enum nv_clk_src src) in gt215_clk_read()
187 gt215_clk_info(struct nvkm_clk *base, int idx, u32 khz, in gt215_clk_info()
235 gt215_pll_info(struct nvkm_clk *base, int idx, u32 pll, u32 khz, in gt215_pll_info()
307 gt215_clk_pre(struct nvkm_clk *clk, unsigned long *flags) in gt215_clk_pre()
342 gt215_clk_post(struct nvkm_clk *clk, unsigned long *flags) in gt215_clk_post()
459 gt215_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate) in gt215_clk_calc()
486 gt215_clk_prog(struct nvkm_clk *base) in gt215_clk_prog()
516 gt215_clk_tidy(struct nvkm_clk *base) in gt215_clk_tidy()
541 struct nvkm_clk **pclk) in gt215_clk_new()
H A Dgk20a_devfreq.c79 struct nvkm_clk *base = nvkm_clk(subdev); in dev_to_gk20a_devfreq()
187 struct nvkm_clk *base = nvkm_clk(subdev); in gk20a_devfreq_target()
212 struct nvkm_clk *base = nvkm_clk(subdev); in gk20a_devfreq_get_cur_freq()
261 int gk20a_devfreq_init(struct nvkm_clk *base, struct gk20a_devfreq **gdevfreq) in gk20a_devfreq_init()
H A Dnv04.c32 nv04_clk_pll_calc(struct nvkm_clk *clock, struct nvbios_pll *info, in nv04_clk_pll_calc()
49 nv04_clk_pll_prog(struct nvkm_clk *clk, u32 reg1, struct nvkm_pll_vals *pv) in nv04_clk_pll_prog()
76 struct nvkm_clk **pclk) in nv04_clk_new()
H A Dgk20a_devfreq.h10 int gk20a_devfreq_init(struct nvkm_clk *base, struct gk20a_devfreq **devfreq);
15 static inline int gk20a_devfreq_init(struct nvkm_clk *base, struct gk20a_devfreq **devfreq) in gk20a_devfreq_init()
H A Dmcp77.c33 struct nvkm_clk base;
81 mcp77_clk_read(struct nvkm_clk *base, enum nv_clk_src src) in mcp77_clk_read()
200 mcp77_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate) in mcp77_clk_calc()
296 mcp77_clk_prog(struct nvkm_clk *base) in mcp77_clk_prog()
391 mcp77_clk_tidy(struct nvkm_clk *base) in mcp77_clk_tidy()
413 struct nvkm_clk **pclk) in mcp77_clk_new()
H A Dnv50.c192 nv50_clk_read(struct nvkm_clk *base, enum nv_clk_src src) in nv50_clk_read()
369 nv50_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate) in nv50_clk_calc()
496 nv50_clk_prog(struct nvkm_clk *base) in nv50_clk_prog()
503 nv50_clk_tidy(struct nvkm_clk *base) in nv50_clk_tidy()
511 enum nvkm_subdev_type type, int inst, bool allow_reclock, struct nvkm_clk **pclk) in nv50_clk_new_()
560 struct nvkm_clk **pclk) in nv50_clk_new()
H A Dgf100.c42 struct nvkm_clk base;
158 gf100_clk_read(struct nvkm_clk *base, enum nv_clk_src src) in gf100_clk_read()
325 gf100_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate) in gf100_clk_calc()
416 gf100_clk_prog(struct nvkm_clk *base) in gf100_clk_prog()
442 gf100_clk_tidy(struct nvkm_clk *base) in gf100_clk_tidy()
472 struct nvkm_clk **pclk) in gf100_clk_new()
H A Dgk20a.c461 gk20a_clk_read(struct nvkm_clk *base, enum nv_clk_src src) in gk20a_clk_read()
481 gk20a_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate) in gk20a_clk_calc()
490 gk20a_clk_prog(struct nvkm_clk *base) in gk20a_clk_prog()
503 gk20a_clk_tidy(struct nvkm_clk *base) in gk20a_clk_tidy()
544 gk20a_clk_fini(struct nvkm_clk *base) in gk20a_clk_fini()
566 gk20a_clk_init(struct nvkm_clk *base) in gk20a_clk_init()
647 struct nvkm_clk **pclk) in gk20a_clk_new()
H A Dgk104.c42 struct nvkm_clk base;
189 gk104_clk_read(struct nvkm_clk *base, enum nv_clk_src src) in gk104_clk_read()
339 gk104_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate) in gk104_clk_calc()
448 gk104_clk_prog(struct nvkm_clk *base) in gk104_clk_prog()
479 gk104_clk_tidy(struct nvkm_clk *base) in gk104_clk_tidy()
508 struct nvkm_clk **pclk) in gk104_clk_new()
H A Dgm20b.c465 gm20b_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate) in gm20b_clk_calc()
573 gm20b_clk_prog(struct nvkm_clk *base) in gm20b_clk_prog()
721 gm20b_clk_fini(struct nvkm_clk *base) in gm20b_clk_fini()
812 gm20b_clk_init(struct nvkm_clk *base) in gm20b_clk_init()
917 struct nvkm_clk **pclk) in gm20b_clk_new_speedo0()
1020 struct nvkm_clk **pclk) in gm20b_clk_new()
H A Dgp10b.h7 struct nvkm_clk base;
H A Dg84.c45 struct nvkm_clk **pclk) in g84_clk_new()
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/
H A Dgk20a.c53 struct nvkm_clk *clk = pmu->base.subdev.device->clk; in gk20a_pmu_dvfs_target()
61 struct nvkm_clk *clk = pmu->base.subdev.device->clk; in gk20a_pmu_dvfs_get_cur_state()
71 struct nvkm_clk *clk = pmu->base.subdev.device->clk; in gk20a_pmu_dvfs_get_target_state()
122 struct nvkm_clk *clk = device->clk; in gk20a_pmu_dvfs_work()
/linux/drivers/gpu/drm/nouveau/nvkm/engine/device/
H A Dctrl.c40 struct nvkm_clk *clk = ctrl->device->clk; in nvkm_control_mthd_pstate_info()
73 struct nvkm_clk *clk = ctrl->device->clk; in nvkm_control_mthd_pstate_attr()
146 struct nvkm_clk *clk = ctrl->device->clk; in nvkm_control_mthd_pstate_user()
/linux/drivers/gpu/drm/nouveau/include/nvkm/core/
H A Dlayout.h28 NVKM_LAYOUT_ONCE(NVKM_SUBDEV_CLK , struct nvkm_clk , clk)
/linux/drivers/gpu/drm/nouveau/dispnv04/
H A Dhw.c261 struct nvkm_clk *clk = nvxx_clk(drm); in nouveau_hw_fix_bad_vpll()
472 struct nvkm_clk *clk = nvxx_clk(drm); in nv_load_state_ramdac()
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dramgf100.c133 struct nvkm_clk *clk = device->clk; in gf100_ram_calc()

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