Home
last modified time | relevance | path

Searched refs:num_writer_wm_sets (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/
H A Ddm_pp_smu.h93 unsigned int num_writer_wm_sets; member
/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0_5_ppt.c424 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in smu_v13_0_5_set_watermarks_table()
441 for (i = 0; i < clock_ranges->num_writer_wm_sets; i++) { in smu_v13_0_5_set_watermarks_table()
H A Dsmu_v13_0_4_ppt.c680 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in smu_v13_0_4_set_watermarks_table()
697 for (i = 0; i < clock_ranges->num_writer_wm_sets; i++) { in smu_v13_0_4_set_watermarks_table()
H A Dyellow_carp_ppt.c515 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in yellow_carp_set_watermarks_table()
532 for (i = 0; i < clock_ranges->num_writer_wm_sets; i++) { in yellow_carp_set_watermarks_table()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu15/
H A Dsmu_v15_0_0_ppt.c584 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in smu_v15_0_0_set_watermarks_table()
601 for (i = 0; i < clock_ranges->num_writer_wm_sets; i++) { in smu_v15_0_0_set_watermarks_table()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu12/
H A Drenoir_ppt.c1063 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in renoir_set_watermarks_table()
1083 for (i = 0; i < clock_ranges->num_writer_wm_sets; i++) { in renoir_set_watermarks_table()
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_pp_smu.c477 wm_with_clock_ranges.num_wm_mcif_sets = ranges->num_writer_wm_sets; in pp_rv_set_wm_ranges()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu14/
H A Dsmu_v14_0_0_ppt.c497 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in smu_v14_0_0_set_watermarks_table()
514 for (i = 0; i < clock_ranges->num_writer_wm_sets; i++) { in smu_v14_0_0_set_watermarks_table()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
H A Drn_clk_mgr.c503 ranges->num_writer_wm_sets = 1; in build_watermark_ranges()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dvangogh_ppt.c1609 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in vangogh_set_watermarks_table()
1626 for (i = 0; i < clock_ranges->num_writer_wm_sets; i++) { in vangogh_set_watermarks_table()
H A Dnavi10_ppt.c1926 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in navi10_set_watermarks_table()
1943 for (i = 0; i < clock_ranges->num_writer_wm_sets; i++) { in navi10_set_watermarks_table()
H A Dsienna_cichlid_ppt.c1842 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in sienna_cichlid_set_watermarks_table()
1859 for (i = 0; i < clock_ranges->num_writer_wm_sets; i++) { in sienna_cichlid_set_watermarks_table()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn301/
H A Ddcn301_resource.c1387 ranges.num_writer_wm_sets = 1; in set_wm_ranges()
/linux/drivers/gpu/drm/amd/display/dc/dml/calcs/
H A Ddcn_calcs.c1391 ranges.num_writer_wm_sets = WM_SET_COUNT; in dcn_bw_notify_pplib_of_wm_ranges()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn20/
H A Ddcn20_resource.c2631 ranges.num_writer_wm_sets = 1; in dcn20_resource_construct()