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Searched refs:num_reader_wm_sets (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/
H A Ddm_pp_smu.h90 unsigned int num_reader_wm_sets; member
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
H A Drn_clk_mgr.c494 ranges->num_reader_wm_sets = num_valid_sets; in build_watermark_ranges()
499 …ranges->reader_wm_sets[ranges->num_reader_wm_sets - 1].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK… in build_watermark_ranges()
500 …ranges->reader_wm_sets[ranges->num_reader_wm_sets - 1].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_… in build_watermark_ranges()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn301/
H A Ddcn301_resource.c1362 ranges.num_reader_wm_sets = 0; in set_wm_ranges()
1371 ranges.num_reader_wm_sets = 1; in set_wm_ranges()
1380 ranges.num_reader_wm_sets = i + 1; in set_wm_ranges()
1384 …ranges.reader_wm_sets[ranges.num_reader_wm_sets - 1].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UN… in set_wm_ranges()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0_5_ppt.c423 if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES || in smu_v13_0_5_set_watermarks_table()
427 for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) { in smu_v13_0_5_set_watermarks_table()
H A Dsmu_v13_0_4_ppt.c679 if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES || in smu_v13_0_4_set_watermarks_table()
683 for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) { in smu_v13_0_4_set_watermarks_table()
H A Dyellow_carp_ppt.c514 if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES || in yellow_carp_set_watermarks_table()
518 for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) { in yellow_carp_set_watermarks_table()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn20/
H A Ddcn20_resource.c2605 ranges.num_reader_wm_sets = 0; in dcn20_resource_construct()
2614 ranges.num_reader_wm_sets = 1; in dcn20_resource_construct()
2624 ranges.num_reader_wm_sets = i + 1; in dcn20_resource_construct()
2628 …ranges.reader_wm_sets[ranges.num_reader_wm_sets - 1].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UN… in dcn20_resource_construct()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu15/
H A Dsmu_v15_0_0_ppt.c583 if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES || in smu_v15_0_0_set_watermarks_table()
587 for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) { in smu_v15_0_0_set_watermarks_table()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu12/
H A Drenoir_ppt.c1062 if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES || in renoir_set_watermarks_table()
1067 for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) { in renoir_set_watermarks_table()
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_pp_smu.c476 wm_with_clock_ranges.num_wm_dmif_sets = ranges->num_reader_wm_sets; in pp_rv_set_wm_ranges()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu14/
H A Dsmu_v14_0_0_ppt.c496 if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES || in smu_v14_0_0_set_watermarks_table()
500 for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) { in smu_v14_0_0_set_watermarks_table()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dvangogh_ppt.c1608 if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES || in vangogh_set_watermarks_table()
1612 for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) { in vangogh_set_watermarks_table()
H A Dnavi10_ppt.c1925 if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES || in navi10_set_watermarks_table()
1929 for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) { in navi10_set_watermarks_table()
H A Dsienna_cichlid_ppt.c1841 if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES || in sienna_cichlid_set_watermarks_table()
1845 for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) { in sienna_cichlid_set_watermarks_table()
/linux/drivers/gpu/drm/amd/display/dc/dml/calcs/
H A Ddcn_calcs.c1390 ranges.num_reader_wm_sets = WM_SET_COUNT; in dcn_bw_notify_pplib_of_wm_ranges()