Searched refs:num_dppclk_levels (Results 1 – 9 of 9) sorted by relevance
136 if (dc_clk_table->num_entries_per_clk.num_dppclk_levels) { in dcn401_convert_dc_clock_table_to_soc_bb_clock_table()137 dml_clk_table->dppclk.num_clk_values = dc_clk_table->num_entries_per_clk.num_dppclk_levels; in dcn401_convert_dc_clock_table_to_soc_bb_clock_table()
136 unsigned int num_dppclk_levels; member
98 clk_mgr->base.bw_params->clk_table.num_entries_per_clk.num_dppclk_levels > 1; in dcn401_is_ppclk_dpm_enabled()284 &num_entries_per_clk->num_dppclk_levels); in dcn401_init_clocks()300 for (i = 0; i < num_entries_per_clk->num_dppclk_levels; i++) in dcn401_init_clocks()1512 num_clk_levels = clk_mgr->base.bw_params->clk_table.num_entries_per_clk.num_dppclk_levels; in dcn401_get_max_clock_khz()
887 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_dppclk_levels = in dcn321_update_bw_bounding_box_fpu()888 dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_dppclk_levels; in dcn321_update_bw_bounding_box_fpu()
224 &num_entries_per_clk->num_dppclk_levels); in dcn32_init_clocks()225 num_levels = num_entries_per_clk->num_dppclk_levels; in dcn32_init_clocks()
380 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_dppclk_levels = in dcn35_update_bw_bounding_box_fpu()
413 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_dppclk_levels = in dcn351_update_bw_bounding_box_fpu()
1140 bw_params->clk_table.num_entries_per_clk.num_dppclk_levels = clock_table->NumDispClkLevelsEnabled; in dcn35_clk_mgr_helper_populate_bw_params()1309 num_clk_levels = clk_mgr->base.bw_params->clk_table.num_entries_per_clk.num_dppclk_levels; in dcn35_get_max_clock_khz()
3338 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_dppclk_levels = in dcn32_update_bw_bounding_box_fpu()3339 dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_dppclk_levels; in dcn32_update_bw_bounding_box_fpu()