| /linux/drivers/crypto/intel/qat/qat_common/ |
| H A D | adf_isr.c | 25 u32 msix_num_entries = hw_data->num_banks + 1; in adf_enable_msix()
183 int clust_irq = hw_data->num_banks; in adf_free_irqs()
187 for (i = 0; i < hw_data->num_banks; i++) { in adf_free_irqs()
208 int clust_irq = hw_data->num_banks; in adf_request_irqs()
214 for (i = 0; i < hw_data->num_banks; i++) { in adf_request_irqs()
238 cpu = ((accel_dev->accel_id * hw_data->num_banks) + in adf_request_irqs()
278 msix_num_entries += hw_data->num_banks; in adf_isr_alloc_msix_vectors_data()
302 for (i = 0; i < hw_data->num_banks; i++) in adf_setup_bh()
315 for (i = 0; i < hw_data->num_banks; i++) { in adf_cleanup_bh()
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| H A D | adf_transport.c | 479 u32 num_banks = 0; in adf_init_etr_data() local
487 num_banks = GET_MAX_BANKS(accel_dev); in adf_init_etr_data()
488 size = num_banks * sizeof(struct adf_etr_bank_data); in adf_init_etr_data()
503 for (i = 0; i < num_banks; i++) { in adf_init_etr_data()
546 u32 i, num_banks = GET_MAX_BANKS(accel_dev); in adf_cleanup_etr_handles() local
548 for (i = 0; i < num_banks; i++) in adf_cleanup_etr_handles()
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| H A D | adf_bank_state.c | 194 if (bank_number >= hw_data->num_banks || !state) in adf_bank_state_save()
225 if (bank_number >= hw_data->num_banks || !state) in adf_bank_state_restore()
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| /linux/drivers/nvmem/ |
| H A D | nintendo-otp.c | 35 unsigned int num_banks; member
40 .num_banks = 1,
45 .num_banks = 8,
101 config.size = data->num_banks * BANK_SIZE; in nintendo_otp_probe()
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| /linux/drivers/hwspinlock/ |
| H A D | sun6i_hwspinlock.c | 96 u32 num_banks; in sun6i_hwspinlock_probe() local
146 num_banks = readl(io_base + SPINLOCK_SYSSTATUS_REG) >> 28; in sun6i_hwspinlock_probe()
147 switch (num_banks) { in sun6i_hwspinlock_probe()
149 priv->nlocks = 1 << (4 + num_banks); in sun6i_hwspinlock_probe()
153 dev_err(&pdev->dev, "unsupported hwspinlock setup (%d)\n", num_banks); in sun6i_hwspinlock_probe()
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| /linux/drivers/mtd/nand/raw/ingenic/ |
| H A D | ingenic_nand_drv.c | 47 unsigned int num_banks; member
49 struct ingenic_nand_cs cs[] __counted_by(num_banks);
445 if (num_chips > nfc->num_banks) { in ingenic_nand_init_chips()
447 num_chips, nfc->num_banks); in ingenic_nand_init_chips()
467 unsigned int num_banks; in ingenic_nand_probe() local
471 num_banks = jz4780_nemc_num_banks(dev); in ingenic_nand_probe()
472 if (num_banks == 0) { in ingenic_nand_probe()
477 nfc = devm_kzalloc(dev, struct_size(nfc, cs, num_banks), GFP_KERNEL); in ingenic_nand_probe()
494 nfc->num_banks = num_banks; in ingenic_nand_probe()
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| /linux/drivers/gpio/ |
| H A D | gpio-brcmstb.c | 362 int num_banks = in brcmstb_gpio_sanity_check_banks() local
365 if (res_num_banks != num_banks) { in brcmstb_gpio_sanity_check_banks()
367 res_num_banks, num_banks); in brcmstb_gpio_sanity_check_banks()
586 int num_banks = 0; in brcmstb_gpio_probe() local
638 num_banks); in brcmstb_gpio_probe()
639 num_banks++; in brcmstb_gpio_probe()
651 bank->id = num_banks; in brcmstb_gpio_probe()
719 num_banks++; in brcmstb_gpio_probe()
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| H A D | gpio-stmpe.c | 186 int num_banks = DIV_ROUND_UP(stmpe->num_gpios, 8); in stmpe_gpio_irq_sync_unlock() local
225 for (j = 0; j < num_banks; j++) { in stmpe_gpio_irq_sync_unlock()
393 int num_banks = DIV_ROUND_UP(stmpe->num_gpios, 8); in stmpe_gpio_irq() local
411 ret = stmpe_block_read(stmpe, statmsbreg, num_banks, status); in stmpe_gpio_irq()
415 for (i = 0; i < num_banks; i++) { in stmpe_gpio_irq()
417 num_banks - i - 1; in stmpe_gpio_irq()
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| H A D | gpio-eic-sprd.c | 618 u16 num_banks = 0; in sprd_eic_probe() local
653 num_banks++; in sprd_eic_probe()
657 sprd_eic->chip.ngpio = num_banks * SPRD_EIC_PER_BANK_NR; in sprd_eic_probe()
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| /linux/drivers/thermal/mediatek/ |
| H A D | auxadc_thermal.c | 312 s32 num_banks; member
486 .num_banks = MT8173_NUM_ZONES,
526 .num_banks = 1,
557 .num_banks = MT8365_NUM_BANKS,
591 .num_banks = 1,
616 .num_banks = MT7622_NUM_ZONES,
651 .num_banks = MT8183_NUM_ZONES,
676 .num_banks = MT7986_NUM_ZONES,
854 for (i = 0; i < mt->conf->num_banks; i++) { in mtk_read_temp()
1284 for (i = 0; i < mt->conf->num_banks; i++) in mtk_thermal_probe()
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| /linux/drivers/leds/ |
| H A D | leds-lm3697.c | 90 int num_banks; member
92 struct lm3697_led leds[] __counted_by(num_banks);
193 for (i = 0; i < priv->num_banks; i++) { in lm3697_init()
318 led->num_banks = count; in lm3697_probe()
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| /linux/drivers/soc/qcom/ |
| H A D | ocmem.c | 298 int i, j, ret, num_banks; in ocmem_dev_probe() local
366 num_banks = ocmem->num_ports / 2; in ocmem_dev_probe()
367 region_size = ocmem->config->macro_size * num_banks; in ocmem_dev_probe()
383 if (WARN_ON(num_banks > ARRAY_SIZE(region->macro_state))) { in ocmem_dev_probe()
389 region->num_macros = num_banks; in ocmem_dev_probe()
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| H A D | llcc-qcom.c | 152 u32 num_banks; member
4091 .num_banks = 4,
4148 .num_banks = 2,
4159 .num_banks = 2,
4657 max_cap_cacheline = max_cap_cacheline / drv_data->num_banks; in _qcom_llcc_cfg_program()
4827 attr3_val /= drv_data->num_banks; in _qcom_llcc_cfg_program_v6()
5002 u32 num_banks; in qcom_llcc_probe() local
5040 if (cfg->num_banks) { in qcom_llcc_probe()
5041 num_banks = cfg->num_banks; in qcom_llcc_probe()
5043 ret = regmap_read(regmap, cfg->reg_offset[LLCC_COMMON_STATUS0], &num_banks); in qcom_llcc_probe()
[all …]
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_socbb.h | 68 uint32_t num_banks; member
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn10/ |
| H A D | dcn10_fpu.c | 119 .num_banks = 8,
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| /linux/drivers/crypto/intel/qat/qat_dh895xccvf/ |
| H A D | adf_dh895xccvf_hw_data.c | 64 hw_data->num_banks = ADF_DH895XCCIOV_ETR_MAX_BANKS; in adf_init_hw_data_dh895xcciov()
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| /linux/drivers/crypto/intel/qat/qat_c3xxxvf/ |
| H A D | adf_c3xxxvf_hw_data.c | 64 hw_data->num_banks = ADF_C3XXXIOV_ETR_MAX_BANKS; in adf_init_hw_data_c3xxxiov()
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| /linux/drivers/crypto/intel/qat/qat_c62xvf/ |
| H A D | adf_c62xvf_hw_data.c | 64 hw_data->num_banks = ADF_C62XIOV_ETR_MAX_BANKS; in adf_init_hw_data_c62xiov()
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| /linux/drivers/edac/ |
| H A D | qcom_edac.c | 297 for (i = 0; i < drv->num_banks; i++) { in llcc_ecc_irq_handler()
353 llcc_driv_data->num_banks, 1, in qcom_llcc_edac_probe()
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| /linux/drivers/pinctrl/meson/ |
| H A D | pinctrl-meson.h | 119 unsigned int num_banks; member
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| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm_plane.c | 186 unsigned int bankw, bankh, mtaspect, tile_split, num_banks; in amdgpu_dm_plane_fill_gfx8_tiling_info_from_flags() local
192 num_banks = AMDGPU_TILING_GET(tiling_flags, NUM_BANKS); in amdgpu_dm_plane_fill_gfx8_tiling_info_from_flags()
196 tiling_info->gfx8.num_banks = num_banks; in amdgpu_dm_plane_fill_gfx8_tiling_info_from_flags()
220 tiling_info->gfx9.num_banks = in amdgpu_dm_plane_fill_gfx9_tiling_info_from_device()
221 adev->gfx.config.gb_addr_config_fields.num_banks; in amdgpu_dm_plane_fill_gfx9_tiling_info_from_device()
257 tiling_info->gfx9.num_banks = 1u << mod_bank_xor_bits; in amdgpu_dm_plane_fill_gfx9_tiling_info_from_modifier()
458 ilog2(adev->gfx.config.gb_addr_config_fields.num_banks)); in amdgpu_dm_plane_add_gfx9_modifiers()
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| /linux/include/linux/soc/qcom/ |
| H A D | llcc-qcom.h | 171 u32 num_banks; member
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| /linux/drivers/crypto/intel/qat/qat_6xxx/ |
| H A D | adf_6xxx_hw_data.c | 448 if (bank_number >= hw_data->num_banks) in ring_pair_reset()
626 for (i = 0; i < hw_data->num_banks; i++) { in adf_gen6_set_vc()
880 hw_data->num_banks = ADF_GEN6_ETR_MAX_BANKS; in adf_init_hw_data_6xxx()
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| /linux/drivers/pinctrl/bcm/ |
| H A D | pinctrl-iproc-gpio.c | 113 unsigned num_banks; member
175 for (i = 0; i < chip->num_banks; i++) { in iproc_gpio_irq_handler()
860 chip->num_banks = (ngpios + NGPIOS_PER_BANK - 1) / NGPIOS_PER_BANK; in iproc_gpio_probe()
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| /linux/drivers/gpu/drm/amd/display/dc/ |
| H A D | dc_hw_types.h | 363 unsigned int num_banks; member
425 unsigned int num_banks; member
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