Searched refs:new_cdclk_state (Results 1 – 2 of 2) sorted by relevance
2683 const struct intel_cdclk_state *new_cdclk_state = in intel_cdclk_pcode_pre_notify() local2689 &new_cdclk_state->actual) && in intel_cdclk_pcode_pre_notify()2691 dg2_power_well_count(display, new_cdclk_state)) in intel_cdclk_pcode_pre_notify()2697 change_cdclk = new_cdclk_state->actual.cdclk != old_cdclk_state->actual.cdclk; in intel_cdclk_pcode_pre_notify()2698 update_pipe_count = dg2_power_well_count(display, new_cdclk_state) > in intel_cdclk_pcode_pre_notify()2708 cdclk = max(new_cdclk_state->actual.cdclk, old_cdclk_state->actual.cdclk); in intel_cdclk_pcode_pre_notify()2717 num_active_pipes = dg2_power_well_count(display, new_cdclk_state); in intel_cdclk_pcode_pre_notify()2726 const struct intel_cdclk_state *new_cdclk_state = in intel_cdclk_pcode_post_notify() local2734 voltage_level = new_cdclk_state->actual.voltage_level; in intel_cdclk_pcode_post_notify()2736 update_cdclk = new_cdclk_state->actual.cdclk != old_cdclk_state->actual.cdclk; in intel_cdclk_pcode_post_notify()[all …]
323 const struct intel_cdclk_state *new_cdclk_state; in intel_pmdemand_atomic_check() local359 new_cdclk_state = intel_atomic_get_cdclk_state(state); in intel_pmdemand_atomic_check()360 if (IS_ERR(new_cdclk_state)) in intel_pmdemand_atomic_check()361 return PTR_ERR(new_cdclk_state); in intel_pmdemand_atomic_check()364 intel_cdclk_actual_voltage_level(new_cdclk_state); in intel_pmdemand_atomic_check()366 DIV_ROUND_UP(intel_cdclk_actual(new_cdclk_state), 1000); in intel_pmdemand_atomic_check()