Home
last modified time | relevance | path

Searched refs:mux_val (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/clk/mmp/
H A Dclk-mix.c131 static int _set_rate(struct mmp_clk_mix *mix, u32 mux_val, u32 div_val, in _set_rate() argument
163 mux_div |= MMP_CLK_BITS_SET_VAL(mux_val, width, shift); in _set_rate()
277 u32 div_val, mux_val; in mmp_clk_mix_set_rate_and_parent() local
281 mux_val = _get_mux_val(mix, index); in mmp_clk_mix_set_rate_and_parent()
283 return _set_rate(mix, mux_val, div_val, 1, 1); in mmp_clk_mix_set_rate_and_parent()
293 u32 mux_val; in mmp_clk_mix_get_parent() local
310 mux_val = MMP_CLK_BITS_GET_VAL(mux_div, width, shift); in mmp_clk_mix_get_parent()
312 return _get_mux(mix, mux_val); in mmp_clk_mix_get_parent()
350 u32 div_val, mux_val; in mmp_clk_set_parent() local
362 mux_val = _get_mux_val(mix, item->parent_index); in mmp_clk_set_parent()
[all …]
/linux/drivers/pinctrl/freescale/
H A Dpinctrl-imx-scmi.c68 int mux_reg, conf_reg, input_reg, mux_val, conf_val, input_val; in pinctrl_scmi_imx_dt_node_to_map() local
116 mux_val = be32_to_cpu(*list++); in pinctrl_scmi_imx_dt_node_to_map()
120 mux_val |= IMX_SCMI_IOMUXC_CONFIG_SION; in pinctrl_scmi_imx_dt_node_to_map()
124 cfg[j++] = pinconf_to_config_packed(IMX_SCMI_PIN_MUX, (mux_val & 0xFF)); in pinctrl_scmi_imx_dt_node_to_map()
126 if (mux_val & 0xFF00) { in pinctrl_scmi_imx_dt_node_to_map()
127 int ext_val = (mux_val & 0xFF00) >> 8; in pinctrl_scmi_imx_dt_node_to_map()
/linux/drivers/dma/ti/
H A Ddma-crossbar.c49 u8 mux_val; member
71 map->mux_val, map->dma_line); in ti_am335x_xbar_free()
114 map->mux_val = (u8)dma_spec->args[2]; in ti_am335x_xbar_route_allocate()
120 map->mux_val, map->dma_line); in ti_am335x_xbar_route_allocate()
122 ti_am335x_xbar_write(xbar->iomem, map->dma_line, map->mux_val); in ti_am335x_xbar_route_allocate()
/linux/drivers/gpio/
H A Dgpio-sodaville.c187 u32 mux_val; in sdv_gpio_probe() local
207 ret = of_property_read_u32(pdev->dev.of_node, "intel,muxctl", &mux_val); in sdv_gpio_probe()
209 writel(mux_val, sd->gpio_pub_base + GPMUXCTL); in sdv_gpio_probe()
/linux/drivers/pinctrl/bcm/
H A Dpinctrl-bcm6328.c35 unsigned mux_val:2; member
246 .mux_val = mux, \
331 bcm6328_rmw_mux(pc, pg->pins[0], f->mode_val, f->mux_val); in bcm6328_pinctrl_set_mux()
H A Dpinctrl-bcm6318.c36 unsigned mux_val:2; member
310 .mux_val = mux, \
417 bcm6318_rmw_mux(pc, pg->pins[0], f->mode_val, f->mux_val); in bcm6318_pinctrl_set_mux()
/linux/drivers/clk/x86/
H A Dclk-cgu.h180 unsigned int mux_val; member
216 .mux_val = _v, \
/linux/drivers/pinctrl/mediatek/
H A Dpinctrl-airoha.c1435 #define AIROHA_PINCTRL_PWM(gpio, mux_val) \ argument
1441 (mux_val), \
1442 (mux_val) \
1447 #define AIROHA_PINCTRL_PWM_EXT(gpio, mux_val) \ argument
1453 (mux_val), \
1454 (mux_val) \
1506 #define AIROHA_PINCTRL_PHY_LED0(gpio, mux_val, map_mask, map_val) \ argument
1512 (mux_val), \
1513 (mux_val), \
1524 #define AIROHA_PINCTRL_PHY_LED1(gpio, mux_val, map_mask, map_val) \ argument
[all …]
/linux/drivers/pinctrl/
H A Dpinctrl-zynq.c71 unsigned int mux_val; member
761 .mux_val = mval, \
769 .mux_val = mval, \
928 reg |= func->mux_val << ZYNQ_PINMUX_MUX_SHIFT; in zynq_pinmux_set_mux()
H A Dpinctrl-bm1880.c69 u32 mux_val; member
655 .mux_val = mval, \
1000 regval |= func->mux_val << mux_offset; in bm1880_pinmux_set_mux()
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dfsl,imx-pinctrl.txt26 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val