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Searched refs:mpc (Results 1 – 25 of 97) sorted by relevance

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/linux/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Dmpc.h324 struct mpc { struct
382 struct mpc *mpc,
400 struct mpc *mpc,
427 struct mpc *mpc,
451 struct mpc *mpc,
468 void (*mpc_init)(struct mpc *mpc);
480 struct mpc *mpc,
499 struct mpc *mpc,
520 struct mpc *mpc,
548 struct mpc *mpc,
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/linux/net/atm/
H A Dmpc.c69 static void MPOA_trigger_rcvd(struct k_message *msg, struct mpoa_client *mpc);
70 static void MPOA_res_reply_rcvd(struct k_message *msg, struct mpoa_client *mpc);
71 static void ingress_purge_rcvd(struct k_message *msg, struct mpoa_client *mpc);
72 static void egress_purge_rcvd(struct k_message *msg, struct mpoa_client *mpc);
73 static void mps_death(struct k_message *msg, struct mpoa_client *mpc);
74 static void clean_up(struct k_message *msg, struct mpoa_client *mpc,
77 struct mpoa_client *mpc);
79 struct mpoa_client *mpc);
81 struct mpoa_client *mpc);
83 static const uint8_t *copy_macs(struct mpoa_client *mpc,
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H A Dmpoa_caches.c133 static int cache_hit(in_cache_entry *entry, struct mpoa_client *mpc) in cache_hit() argument
143 if (entry->count > mpc->parameters.mpc_p1) { in cache_hit()
146 memcpy(msg.MPS_ctrl, mpc->mps_ctrl_addr, ATM_ESA_LEN); in cache_hit()
150 msg_to_mpoad(&msg, mpc); in cache_hit()
162 if (entry->count > mpc->parameters.mpc_p1 && in cache_hit()
165 mpc->dev->name, &entry->ctrl_info.in_dst_ip); in cache_hit()
168 memcpy(msg.MPS_ctrl, mpc->mps_ctrl_addr, ATM_ESA_LEN); in cache_hit()
173 msg_to_mpoad(&msg, mpc); in cache_hit()
324 static void in_destroy_cache(struct mpoa_client *mpc) in in_destroy_cache() argument
326 write_lock_irq(&mpc->ingress_lock); in in_destroy_cache()
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H A Dmpoa_proc.c107 struct mpoa_client *mpc; in mpc_start() local
111 for (mpc = mpcs; mpc; mpc = mpc->next) in mpc_start()
113 return mpc; in mpc_start()
133 struct mpoa_client *mpc = v; in mpc_show() local
145 seq_printf(m, "\nInterface %d:\n\n", mpc->dev_num); in mpc_show()
149 for (in_entry = mpc->in_cache; in_entry; in_entry = in_entry->next) { in mpc_show()
168 for (eg_entry = mpc->eg_cache; eg_entry; eg_entry = eg_entry->next) { in mpc_show()
/linux/drivers/gpu/drm/amd/display/dc/mpc/dcn30/
H A Ddcn30_mpc.c47 void mpc3_mpc_init(struct mpc *mpc) in mpc3_mpc_init() argument
49 struct dcn30_mpc *mpc30 = TO_DCN30_MPC(mpc); in mpc3_mpc_init()
52 mpc1_mpc_init(mpc); in mpc3_mpc_init()
62 void mpc3_mpc_init_single_inst(struct mpc *mpc, unsigned int mpcc_id) in mpc3_mpc_init_single_inst() argument
64 struct dcn30_mpc *mpc30 = TO_DCN30_MPC(mpc); in mpc3_mpc_init_single_inst()
66 mpc1_mpc_init_single_inst(mpc, mpcc_id); in mpc3_mpc_init_single_inst()
78 struct mpc *mpc, in mpc3_is_dwb_idle() argument
81 struct dcn30_mpc *mpc30 = TO_DCN30_MPC(mpc); in mpc3_is_dwb_idle()
93 struct mpc *mpc, in mpc3_set_dwb_mux() argument
97 struct dcn30_mpc *mpc30 = TO_DCN30_MPC(mpc); in mpc3_set_dwb_mux()
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H A Ddcn30_mpc.h992 struct mpc base;
1011 struct mpc *mpc);
1014 struct mpc *mpc,
1018 struct mpc *mpc,
1023 struct mpc *mpc,
1027 uint32_t mpcc3_acquire_rmu(struct mpc *mpc,
1031 struct mpc *mpc,
1036 struct mpc *mpc,
1041 struct mpc *mpc,
1047 struct mpc *mpc,
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/linux/drivers/gpu/drm/amd/display/dc/mpc/dcn32/
H A Ddcn32_mpc.c45 void mpc32_mpc_init(struct mpc *mpc) in mpc32_mpc_init() argument
47 struct dcn30_mpc *mpc30 = TO_DCN30_MPC(mpc); in mpc32_mpc_init()
50 mpc3_mpc_init(mpc); in mpc32_mpc_init()
52 if (mpc->ctx->dc->debug.enable_mem_low_power.bits.mpc) { in mpc32_mpc_init()
68 struct mpc *mpc, in mpc32_power_on_blnd_lut() argument
72 struct dcn30_mpc *mpc30 = TO_DCN30_MPC(mpc); in mpc32_power_on_blnd_lut()
76 if (mpc->ctx->dc->debug.enable_mem_low_power.bits.cm) { in mpc32_power_on_blnd_lut()
80 } else if (!mpc->ctx->dc->debug.disable_mem_low_power) { in mpc32_power_on_blnd_lut()
92 static enum dc_lut_mode mpc32_get_post1dlut_current(struct mpc *mpc, uint32_t mpcc_id) in mpc32_get_post1dlut_current() argument
98 struct dcn30_mpc *mpc30 = TO_DCN30_MPC(mpc); in mpc32_get_post1dlut_current()
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H A Ddcn32_mpc.h311 void mpc32_mpc_init(struct mpc *mpc);
313 struct mpc *mpc,
317 struct mpc *mpc,
321 struct mpc *mpc,
334 struct mpc *mpc,
338 struct mpc *mpc,
343 struct mpc *mpc,
347 struct mpc *mpc,
351 struct mpc *mpc,
355 struct mpc *mpc,
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/linux/drivers/gpu/drm/amd/display/dc/mpc/dcn401/
H A Ddcn401_mpc.c43 void mpc401_update_3dlut_fast_load_select(struct mpc *mpc, int mpcc_id, int hubp_idx) in mpc401_update_3dlut_fast_load_select() argument
45 struct dcn401_mpc *mpc401 = TO_DCN401_MPC(mpc); in mpc401_update_3dlut_fast_load_select()
50 void mpc401_set_movable_cm_location(struct mpc *mpc, enum mpcc_movable_cm_location location, int mp… in mpc401_set_movable_cm_location() argument
52 struct dcn401_mpc *mpc401 = TO_DCN401_MPC(mpc); in mpc401_set_movable_cm_location()
67 struct mpc *mpc, in get3dlut_config() argument
74 struct dcn401_mpc *mpc401 = TO_DCN401_MPC(mpc); in get3dlut_config()
111 void mpc401_populate_lut(struct mpc *mpc, const enum MCM_LUT_ID id, const union mcm_lut_params para… in mpc401_populate_lut() argument
131 mpc32_power_on_blnd_lut(mpc, mpcc_id, true); in mpc401_populate_lut()
132 mpc32_configure_post1dlut(mpc, mpcc_id, next_mode == LUT_RAM_A); in mpc401_populate_lut()
135 mpc32_program_post1dluta_settings(mpc, mpcc_id, lut1d); in mpc401_populate_lut()
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H A Ddcn401_mpc.h190 struct mpc base;
207 void mpc401_set_movable_cm_location(struct mpc *mpc, enum mpcc_movable_cm_location location, int mp…
208 void mpc401_populate_lut(struct mpc *mpc, const enum MCM_LUT_ID id, const union mcm_lut_params para…
212 struct mpc *mpc,
219 struct mpc *mpc,
225 struct mpc *mpc,
230 struct mpc *mpc,
235 struct mpc *mpc,
240 struct mpc *mpc,
246 void mpc_read_gamut_remap(struct mpc *mpc,
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/linux/drivers/gpu/drm/amd/display/dc/mpc/dcn20/
H A Ddcn20_mpc.c49 struct mpc *mpc, in mpc2_update_blending() argument
53 struct dcn20_mpc *mpc20 = TO_DCN20_MPC(mpc); in mpc2_update_blending()
55 struct mpcc *mpcc = mpc1_get_mpcc(mpc, mpcc_id); in mpc2_update_blending()
74 struct mpc *mpc, in mpc2_set_denorm() argument
78 struct dcn20_mpc *mpc20 = TO_DCN20_MPC(mpc); in mpc2_set_denorm()
112 struct mpc *mpc, in mpc2_set_denorm_clamp() argument
116 struct dcn20_mpc *mpc20 = TO_DCN20_MPC(mpc); in mpc2_set_denorm_clamp()
132 struct mpc *mpc, in mpc2_set_output_csc() argument
138 struct dcn20_mpc *mpc20 = TO_DCN20_MPC(mpc); in mpc2_set_output_csc()
186 struct mpc *mpc, in mpc2_set_ocsc_default() argument
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H A Ddcn20_mpc.h261 struct mpc base;
278 struct mpc *mpc,
283 struct mpc *mpc,
288 struct mpc *mpc,
293 struct mpc *mpc,
299 struct mpc *mpc,
305 struct mpc *mpc,
309 void mpc2_assert_idle_mpcc(struct mpc *mpc, int id);
310 void mpc2_assert_mpcc_idle_before_connect(struct mpc *mpc, int mpcc_id);
311 void mpc20_power_on_ogam_lut(struct mpc *mpc, int mpcc_id, bool power_on);
/linux/arch/x86/kernel/
H A Dmpparse.c140 static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str) in smp_check_mpc() argument
143 if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) { in smp_check_mpc()
145 mpc->signature[0], mpc->signature[1], in smp_check_mpc()
146 mpc->signature[2], mpc->signature[3]); in smp_check_mpc()
149 if (mpf_checksum((unsigned char *)mpc, mpc->length)) { in smp_check_mpc()
153 if (mpc->spec != 0x01 && mpc->spec != 0x04) { in smp_check_mpc()
154 pr_err("MPTABLE: bad table version (%d)!!\n", mpc->spec); in smp_check_mpc()
157 if (!mpc->lapic) { in smp_check_mpc()
161 memcpy(oem, mpc->oem, 8); in smp_check_mpc()
165 memcpy(str, mpc->productid, 12); in smp_check_mpc()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/mpc/dcn10/
H A Ddcn10_mpc.c40 void mpc1_set_bg_color(struct mpc *mpc, in mpc1_set_bg_color() argument
44 struct dcn10_mpc *mpc10 = TO_DCN10_MPC(mpc); in mpc1_set_bg_color()
45 struct mpcc *bottommost_mpcc = mpc1_get_mpcc(mpc, mpcc_id); in mpc1_set_bg_color()
77 struct mpc *mpc, in mpc1_update_blending() argument
81 struct dcn10_mpc *mpc10 = TO_DCN10_MPC(mpc); in mpc1_update_blending()
82 struct mpcc *mpcc = mpc1_get_mpcc(mpc, mpcc_id); in mpc1_update_blending()
95 struct mpc *mpc, in mpc1_update_stereo_mix() argument
99 struct dcn10_mpc *mpc10 = TO_DCN10_MPC(mpc); in mpc1_update_stereo_mix()
109 void mpc1_assert_idle_mpcc(struct mpc *mpc, int id) in mpc1_assert_idle_mpcc() argument
111 struct dcn10_mpc *mpc10 = TO_DCN10_MPC(mpc); in mpc1_assert_idle_mpcc()
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H A Ddcn10_mpc.h125 struct mpc base;
142 struct mpc *mpc,
151 struct mpc *mpc,
156 struct mpc *mpc);
159 struct mpc *mpc,
163 struct mpc *mpc,
167 struct mpc *mpc,
172 struct mpc *mpc,
177 struct mpc *mpc,
181 struct mpc *mpc,
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/linux/arch/mips/sgi-ip30/
H A Dip30-smp.c79 struct mpconf *mpc; in ip30_smp_setup() local
85 mpc = (struct mpconf *)MPCONF(i); in ip30_smp_setup()
86 if (mpc->magic == MPCONF_MAGIC) { in ip30_smp_setup()
91 i, mpc->prid, mpc->physid, mpc->virtid); in ip30_smp_setup()
112 struct mpconf *mpc = (struct mpconf *)MPCONF(cpu); in ip30_smp_boot_secondary() local
115 mpc->stackaddr = (void *)__KSTK_TOS(idle); in ip30_smp_boot_secondary()
118 mpc->lnch_parm = task_thread_info(idle); in ip30_smp_boot_secondary()
123 mpc->launch = smp_bootstrap; in ip30_smp_boot_secondary()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/
H A Ddcn201_hwseq.c297 res_pool->mpc->funcs->mpc_init(res_pool->mpc); in dcn201_init_hw()
385 struct mpc *mpc = dc->res_pool->mpc; in dcn201_plane_atomic_disconnect() local
394 if (mpc->funcs->get_mpcc_for_dpp_from_secondary) in dcn201_plane_atomic_disconnect()
395 mpcc_to_remove = mpc->funcs->get_mpcc_for_dpp_from_secondary(mpc_tree_params, dpp_id); in dcn201_plane_atomic_disconnect()
398 if (mpcc_to_remove != NULL && mpc->funcs->remove_mpcc_from_secondary) { in dcn201_plane_atomic_disconnect()
399 mpc->funcs->remove_mpcc_from_secondary(mpc, mpc_tree_params, mpcc_to_remove); in dcn201_plane_atomic_disconnect()
404 mpcc_to_remove = mpc->funcs->get_mpcc_for_dpp(mpc_tree_params, dpp_id); in dcn201_plane_atomic_disconnect()
406 mpc->funcs->remove_mpcc(mpc, mpc_tree_params, mpcc_to_remove); in dcn201_plane_atomic_disconnect()
433 struct mpc *mpc = dc->res_pool->mpc; in dcn201_update_mpcc() local
490 mpc->funcs->update_blending(mpc, &blnd_cfg, mpcc_id); in dcn201_update_mpcc()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn30/
H A Ddcn30_hwseq.c185 pool->mpc->funcs->read_mpcc_state(pool->mpc, i, &s); in dcn30_log_color_state()
186 mpc3_get_gamut_remap(pool->mpc, i, &s.gamut_remap); in dcn30_log_color_state()
228 dc->caps.color.mpc.gamut_remap, in dcn30_log_color_state()
229 dc->caps.color.mpc.num_3dluts, in dcn30_log_color_state()
230 dc->caps.color.mpc.ogam_ram, in dcn30_log_color_state()
231 dc->caps.color.mpc.ocsc); in dcn30_log_color_state()
262 struct mpc *mpc = pipe_ctx->stream_res.opp->ctx->dc->res_pool->mpc; in dcn30_set_mpc_shaper_3dlut() local
293 acquired_rmu = mpc->funcs->acquire_rmu(mpc, mpcc_id, in dcn30_set_mpc_shaper_3dlut()
298 result = mpc->funcs->program_3dlut(mpc, &stream->lut3d_func->lut_3d, in dcn30_set_mpc_shaper_3dlut()
303 result = mpc->funcs->program_shaper(mpc, shaper_lut, in dcn30_set_mpc_shaper_3dlut()
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/linux/drivers/gpu/drm/amd/display/dc/mpc/
H A DMakefile32 AMD_DAL_MPC_DCN10 = $(addprefix $(AMDDALPATH)/dc/mpc/dcn10/,$(MPC_DCN10))
41 AMD_DAL_MPC_DCN20 = $(addprefix $(AMDDALPATH)/dc/mpc/dcn20/,$(MPC_DCN20))
50 AMD_DAL_MPC_DCN30 = $(addprefix $(AMDDALPATH)/dc/mpc/dcn30/,$(MPC_DCN30))
59 AMD_DAL_MPC_DCN32 = $(addprefix $(AMDDALPATH)/dc/mpc/dcn32/,$(MPC_DCN32))
68 AMD_DAL_MPC_DCN401 = $(addprefix $(AMDDALPATH)/dc/mpc/dcn401/,$(MPC_DCN401))
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
H A Ddcn401_hwseq.c96 struct mpc *mpc = pipe_ctx->stream_res.opp->ctx->dc->res_pool->mpc; in dcn401_program_gamut_remap() local
115 mpc->funcs->set_gamut_remap(mpc, mpcc_id, &mpc_adjust); in dcn401_program_gamut_remap()
121 mpc->funcs->set_gamut_remap(mpc, mpcc_id, &mpc_adjust); in dcn401_program_gamut_remap()
137 mpc->funcs->set_gamut_remap(mpc, mpcc_id, &mpc_adjust); in dcn401_program_gamut_remap()
387 struct mpc *mpc = dc->res_pool->mpc; in dcn401_get_mcm_lut_xable_from_pipe_ctx() local
394 mpc->funcs->set_movable_cm_location(mpc, MPCC_MOVABLE_CM_LOCATION_BEFORE, mpcc_id); in dcn401_get_mcm_lut_xable_from_pipe_ctx()
421 struct mpc *mpc = dc->res_pool->mpc; in dcn401_populate_mcm_luts() local
444 rval = cm3_helper_translate_curve_to_hw_format(mpc->ctx, in dcn401_populate_mcm_luts()
450 if (mpc->funcs->populate_lut) in dcn401_populate_mcm_luts()
451 mpc->funcs->populate_lut(mpc, MCM_LUT_1DLUT, m_lut_params, lut_bank_a, mpcc_id); in dcn401_populate_mcm_luts()
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/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_hw_sequencer.c866 block_sequence[*num_steps].params.power_on_mpc_mem_pwr_params.mpc = dc->res_pool->mpc; in hwss_build_fast_sequence()
873 block_sequence[*num_steps].params.set_output_csc_params.mpc = dc->res_pool->mpc; in hwss_build_fast_sequence()
880 block_sequence[*num_steps].params.set_ocsc_default_params.mpc = dc->res_pool->mpc; in hwss_build_fast_sequence()
1483 struct mpc *mpc, in hwss_add_mpc_power_on_mpc_mem_pwr() argument
1488 seq_state->steps[*seq_state->num_steps].params.power_on_mpc_mem_pwr_params.mpc = mpc; in hwss_add_mpc_power_on_mpc_mem_pwr()
1500 struct mpc *mpc, in hwss_add_mpc_set_output_csc() argument
1506 seq_state->steps[*seq_state->num_steps].params.set_output_csc_params.mpc = mpc; in hwss_add_mpc_set_output_csc()
1519 struct mpc *mpc, in hwss_add_mpc_set_ocsc_default() argument
1525 seq_state->steps[*seq_state->num_steps].params.set_ocsc_default_params.mpc = mpc; in hwss_add_mpc_set_ocsc_default()
1979 struct mpc *mpc = params->power_on_mpc_mem_pwr_params.mpc; in hwss_power_on_mpc_mem_pwr() local
[all …]
/linux/drivers/gpu/drm/amd/display/dc/hwss/
H A Dhw_sequencer.h125 struct mpc *mpc; member
131 struct mpc *mpc; member
138 struct mpc *mpc; member
392 struct mpc *mpc; member
398 struct mpc *mpc; member
403 struct mpc *mpc; member
413 struct mpc *mpc; member
476 struct mpc *mpc; member
482 struct mpc *mpc; member
1635 struct mpc *mpc, int mpcc_id, bool power_on);
[all …]
/linux/drivers/infiniband/hw/mana/
H A Dqp.c15 struct mana_port_context *mpc = netdev_priv(ndev); in mana_ib_cfg_vport_steering() local
34 req->vport = mpc->port_handle; in mana_ib_cfg_vport_steering()
84 mpc->port_handle, log_ind_tbl_size); in mana_ib_cfg_vport_steering()
102 struct mana_port_context *mpc; in mana_ib_create_qp_rss() local
162 mpc = netdev_priv(ndev); in mana_ib_create_qp_rss()
191 eq = &mpc->ac->eqs[cq->comp_vector]; in mana_ib_create_qp_rss()
194 ret = mana_create_wq_obj(mpc, mpc->port_handle, GDMA_RQ, in mana_ib_create_qp_rss()
253 mana_destroy_wq_obj(mpc, GDMA_RQ, wq->rx_object); in mana_ib_create_qp_rss()
278 struct mana_port_context *mpc; in mana_ib_create_qp_raw() local
316 mpc = netdev_priv(ndev); in mana_ib_create_qp_raw()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn32/
H A Ddcn32_hwseq.c452 struct mpc *mpc = pipe_ctx->stream_res.opp->ctx->dc->res_pool->mpc; in dcn32_set_mpc_shaper_3dlut() local
471 result = mpc->funcs->program_3dlut(mpc, &stream->lut3d_func->lut_3d, mpcc_id); in dcn32_set_mpc_shaper_3dlut()
475 result = mpc->funcs->program_shaper(mpc, shaper_lut, mpcc_id); in dcn32_set_mpc_shaper_3dlut()
488 struct mpc *mpc = pipe_ctx->stream_res.opp->ctx->dc->res_pool->mpc; in dcn32_set_mcm_luts() local
504 mpc->funcs->program_1dlut(mpc, lut_params, mpcc_id); in dcn32_set_mcm_luts()
518 mpc->funcs->program_shaper(mpc, lut_params, mpcc_id); in dcn32_set_mcm_luts()
522 result = mpc->funcs->program_3dlut(mpc, &plane_state->lut3d_func.lut_3d, mpcc_id); in dcn32_set_mcm_luts()
524 result = mpc->funcs->program_3dlut(mpc, NULL, mpcc_id); in dcn32_set_mcm_luts()
534 struct mpc *mpc = dc->res_pool->mpc; in dcn32_set_input_transfer_func() local
541 if (mpc == NULL || plane_state == NULL) in dcn32_set_input_transfer_func()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/
H A Ddcn20_hwseq.c172 pool->mpc->funcs->read_mpcc_state(pool->mpc, i, &s); in dcn20_log_color_state()
184 dc->caps.color.mpc.gamut_remap, in dcn20_log_color_state()
185 dc->caps.color.mpc.num_3dluts, in dcn20_log_color_state()
186 dc->caps.color.mpc.ogam_ram, in dcn20_log_color_state()
187 dc->caps.color.mpc.ocsc); in dcn20_log_color_state()
830 struct mpc *mpc = dc->res_pool->mpc; in dcn20_enable_stream_timing() local
923 if (mpc->funcs->set_out_rate_control) { in dcn20_enable_stream_timing()
925 mpc->funcs->set_out_rate_control( in dcn20_enable_stream_timing()
926 mpc, opp_inst[i], in dcn20_enable_stream_timing()
992 struct mpc *mpc = dc->res_pool->mpc; in dcn20_program_output_csc() local
[all …]

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