| /linux/arch/arm/mach-omap1/ |
| H A D | mux.h | 27 #define MUX_REG(reg, mode_offset, mode) .mux_reg_name = "FUNC_MUX_CTRL_"#reg, \ argument
29 .mask_offset = mode_offset, \
41 #define MUX_REG_7XX(reg, mode_offset, mode) .mux_reg_name = "OMAP7XX_IO_CONF_"#reg, \ argument
43 .mask_offset = mode_offset, \
53 #define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, \ argument
54 .mask_offset = mode_offset, \
64 #define MUX_REG_7XX(reg, mode_offset, mode) \ argument
66 .mask_offset = mode_offset, \
75 #define MUX_CFG(desc, mux_reg, mode_offset, mode, \ argument
81 MUX_REG(mux_reg, mode_offset, mode) \
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| /linux/drivers/media/cec/core/ |
| H A D | cec-pin-error-inj.c | 15 unsigned int mode_offset; member
234 unsigned int mode_offset; in cec_pin_error_inj_parse_line() local
242 mode_offset = cec_error_inj_cmds[i].mode_offset; in cec_pin_error_inj_parse_line()
243 mode_mask = CEC_ERROR_INJ_MODE_MASK << mode_offset; in cec_pin_error_inj_parse_line()
246 if (mode_offset == CEC_ERROR_INJ_RX_ARB_LOST_OFFSET) { in cec_pin_error_inj_parse_line()
252 } else if (mode_offset == CEC_ERROR_INJ_TX_ADD_BYTES_OFFSET) { in cec_pin_error_inj_parse_line()
264 if ((mode_offset == CEC_ERROR_INJ_TX_SHORT_BIT_OFFSET || in cec_pin_error_inj_parse_line()
265 mode_offset == CEC_ERROR_INJ_TX_LONG_BIT_OFFSET || in cec_pin_error_inj_parse_line()
266 mode_offset == CEC_ERROR_INJ_TX_CUSTOM_BIT_OFFSET) && in cec_pin_error_inj_parse_line()
271 *error |= (u64)mode << mode_offset; in cec_pin_error_inj_parse_line()
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| H A D | cec-pin.c | 184 static bool rx_error_inj(struct cec_pin *pin, unsigned int mode_offset, in rx_error_inj() argument
190 unsigned int mode = (e >> mode_offset) & CEC_ERROR_INJ_MODE_MASK; in rx_error_inj()
204 ~(CEC_ERROR_INJ_MODE_MASK << mode_offset); in rx_error_inj()
246 static bool tx_error_inj(struct cec_pin *pin, unsigned int mode_offset, in tx_error_inj() argument
252 unsigned int mode = (e >> mode_offset) & CEC_ERROR_INJ_MODE_MASK; in tx_error_inj()
266 ~(CEC_ERROR_INJ_MODE_MASK << mode_offset); in tx_error_inj()
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| /linux/arch/arm/mach-davinci/ |
| H A D | mux.h | 259 #define MUX_CFG(soc, desc, muxreg, mode_offset, mode_mask, mux_mode, dbg)\ argument
265 .mask_offset = mode_offset, \
270 #define INT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg) \ argument
276 .mask_offset = mode_offset, \
281 #define EVT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg) \ argument
287 .mask_offset = mode_offset, \
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| /linux/drivers/net/wireless/ath/ath5k/ |
| H A D | eeprom.c | 470 u32 mode_offset[3]; in ath5k_eeprom_init_modes() local
478 mode_offset[AR5K_EEPROM_MODE_11A] = AR5K_EEPROM_MODES_11A(ah->ah_ee_version); in ath5k_eeprom_init_modes()
479 mode_offset[AR5K_EEPROM_MODE_11B] = AR5K_EEPROM_MODES_11B(ah->ah_ee_version); in ath5k_eeprom_init_modes()
480 mode_offset[AR5K_EEPROM_MODE_11G] = AR5K_EEPROM_MODES_11G(ah->ah_ee_version); in ath5k_eeprom_init_modes()
486 offset = mode_offset[mode]; in ath5k_eeprom_init_modes()
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| /linux/drivers/platform/x86/intel/pmc/ |
| H A D | core.c | 1519 int num_maps, mode_offset = 0; in pmc_core_pmt_get_lpm_req() local
1533 mode_offset = LPM_HEADER_OFFSET + LPM_MODE_OFFSET; in pmc_core_pmt_get_lpm_req()
1539 u8 sample_id = lpm_indices[m] + mode_offset; in pmc_core_pmt_get_lpm_req()
1549 mode_offset += LPM_REG_COUNT + LPM_MODE_OFFSET; in pmc_core_pmt_get_lpm_req()
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| /linux/drivers/clk/rockchip/ |
| H A D | clk.h | 624 int mode_offset; member
645 .mode_offset = _mode, \
656 int lock_shift, int mode_offset, int mode_shift,
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| H A D | clk-pll.c | 1059 int lock_shift, int mode_offset, int mode_shift, in rockchip_clk_register_pll() argument
1086 pll_mux->reg = ctx->reg_base + mode_offset; in rockchip_clk_register_pll()
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| H A D | clk.c | 443 list->lock_shift, list->mode_offset, in rockchip_clk_register_plls()
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