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Searched refs:mmUVD_RBC_WPTR_POLL_ADDR_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_offset.h411 #define mmUVD_RBC_WPTR_POLL_ADDR_BASE_IDX 1 macro
H A Dvcn_2_5_offset.h804 #define mmUVD_RBC_WPTR_POLL_ADDR_BASE_IDX 1 macro
H A Dvcn_2_0_0_offset.h761 #define mmUVD_RBC_WPTR_POLL_ADDR_BASE_IDX 1 macro
H A Dvcn_3_0_0_offset.h1190 #define mmUVD_RBC_WPTR_POLL_ADDR_BASE_IDX 1 macro