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Searched refs:mmMPCC2_MPCC_STATUS_BASE_IDX (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_1_offset.h3668 #define mmMPCC2_MPCC_STATUS_BASE_IDX 2 macro
H A Ddcn_3_0_1_offset.h10335 #define mmMPCC2_MPCC_STATUS_BASE_IDX 3 macro
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H A Ddcn_1_0_offset.h5452 #define mmMPCC2_MPCC_STATUS_BASE_IDX 2 macro
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H A Ddcn_2_1_0_offset.h5695 #define mmMPCC2_MPCC_STATUS_BASE_IDX 2 macro
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H A Ddcn_3_0_2_offset.h12669 #define mmMPCC2_MPCC_STATUS_BASE_IDX global() macro
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H A Ddcn_2_0_0_offset.h6633 #define mmMPCC2_MPCC_STATUS_BASE_IDX 2 macro
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H A Ddcn_3_0_0_offset.h13980 #define mmMPCC2_MPCC_STATUS_BASE_IDX global() macro
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