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Searched refs:mmDSCC1_DSCC_TEST_DEBUG_INDEX3_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h5853 #define mmDSCC1_DSCC_TEST_DEBUG_INDEX3_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h11849 #define mmDSCC1_DSCC_TEST_DEBUG_INDEX3_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h13013 #define mmDSCC1_DSCC_TEST_DEBUG_INDEX3_BASE_IDX … macro