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Searched refs:mmDP2_DP_DPHY_HBR2_PATTERN_CONTROL_BASE_IDX (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_offset.h8701 #define mmDP2_DP_DPHY_HBR2_PATTERN_CONTROL_BASE_IDX 2 macro
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H A Ddcn_1_0_offset.h9070 #define mmDP2_DP_DPHY_HBR2_PATTERN_CONTROL_BASE_IDX 2 macro
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H A Ddcn_2_1_0_offset.h10614 #define mmDP2_DP_DPHY_HBR2_PATTERN_CONTROL_BASE_IDX global() macro
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H A Ddcn_3_0_2_offset.h10339 #define mmDP2_DP_DPHY_HBR2_PATTERN_CONTROL_BASE_IDX 2 macro
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H A Ddcn_2_0_0_offset.h11703 #define mmDP2_DP_DPHY_HBR2_PATTERN_CONTROL_BASE_IDX global() macro
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H A Ddcn_3_0_0_offset.h11483 #define mmDP2_DP_DPHY_HBR2_PATTERN_CONTROL_BASE_IDX global() macro
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/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h10869 #define mmDP2_DP_DPHY_HBR2_PATTERN_CONTROL_BASE_IDX global() macro
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