| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | mes_v11_0.c | 394 uint32_t me_id, uint32_t pipe_id, in mes_v11_0_reset_queue_mmio() argument 405 me_id, pipe_id, queue_id, vmid); in mes_v11_0_reset_queue_mmio() 422 soc21_grbm_select(adev, me_id, pipe_id, queue_id, 0); in mes_v11_0_reset_queue_mmio() 438 me_id, pipe_id, queue_id); in mes_v11_0_reset_queue_mmio() 440 soc21_grbm_select(adev, me_id, pipe_id, queue_id, 0); in mes_v11_0_reset_queue_mmio() 458 me_id, pipe_id, queue_id); in mes_v11_0_reset_queue_mmio() 459 switch (me_id) { in mes_v11_0_reset_queue_mmio() 767 input->me_id, input->pipe_id, in mes_v11_0_reset_hw_queue()
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| H A D | mes_v12_0.c | 417 uint32_t me_id, uint32_t pipe_id, in mes_v12_0_reset_queue_mmio() argument 428 me_id, pipe_id, queue_id, vmid); in mes_v12_0_reset_queue_mmio() 445 soc21_grbm_select(adev, me_id, pipe_id, queue_id, 0); in mes_v12_0_reset_queue_mmio() 461 me_id, pipe_id, queue_id); in mes_v12_0_reset_queue_mmio() 463 soc21_grbm_select(adev, me_id, pipe_id, queue_id, 0); in mes_v12_0_reset_queue_mmio() 481 me_id, pipe_id, queue_id); in mes_v12_0_reset_queue_mmio() 482 switch (me_id) { in mes_v12_0_reset_queue_mmio() 891 input->me_id, input->pipe_id, in mes_v12_0_reset_hw_queue()
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| H A D | gfx_v12_0.c | 4817 u8 me_id, pipe_id, queue_id; in gfx_v12_0_eop_irq() local 4834 me_id = (entry->ring_id & 0x0c) >> 2; in gfx_v12_0_eop_irq() 4838 switch (me_id) { in gfx_v12_0_eop_irq() 4853 if ((ring->me == me_id) && in gfx_v12_0_eop_irq() 4991 u8 me_id, pipe_id, queue_id; in gfx_v12_0_handle_priv_fault() local 4995 me_id = (entry->ring_id & 0x0c) >> 2; in gfx_v12_0_handle_priv_fault() 5000 switch (me_id) { in gfx_v12_0_handle_priv_fault() 5004 if (ring->me == me_id && ring->pipe == pipe_id && in gfx_v12_0_handle_priv_fault() 5013 if (ring->me == me_id && ring->pipe == pipe_id && in gfx_v12_0_handle_priv_fault()
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| H A D | gfx_v10_0.c | 3822 uint32_t me_id, uint32_t pipe_id, uint32_t queue_id, in gfx_v10_0_kiq_reset_hw_queue() argument 3832 nv_grbm_select(adev, me_id, pipe_id, queue_id, 0); in gfx_v10_0_kiq_reset_hw_queue() 9183 u8 me_id, pipe_id, queue_id; in gfx_v10_0_eop_irq() local 9188 me_id = (entry->ring_id & 0x0c) >> 2; in gfx_v10_0_eop_irq() 9192 switch (me_id) { in gfx_v10_0_eop_irq() 9207 if ((ring->me == me_id) && in gfx_v10_0_eop_irq() 9344 u8 me_id, pipe_id, queue_id; in gfx_v10_0_handle_priv_fault() local 9348 me_id = (entry->ring_id & 0x0c) >> 2; in gfx_v10_0_handle_priv_fault() 9352 switch (me_id) { in gfx_v10_0_handle_priv_fault() 9356 if (ring->me == me_id && ring->pipe == pipe_id && in gfx_v10_0_handle_priv_fault() [all …]
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| H A D | gfx_v11_0.c | 6451 u8 me_id, pipe_id, queue_id; in gfx_v11_0_eop_irq() local 6468 me_id = (entry->ring_id & 0x0c) >> 2; in gfx_v11_0_eop_irq() 6472 switch (me_id) { in gfx_v11_0_eop_irq() 6487 if ((ring->me == me_id) && in gfx_v11_0_eop_irq() 6625 u8 me_id, pipe_id, queue_id; in gfx_v11_0_handle_priv_fault() local 6629 me_id = (entry->ring_id & 0x0c) >> 2; in gfx_v11_0_handle_priv_fault() 6634 switch (me_id) { in gfx_v11_0_handle_priv_fault() 6638 if (ring->me == me_id && ring->pipe == pipe_id && in gfx_v11_0_handle_priv_fault() 6647 if (ring->me == me_id && ring->pipe == pipe_id && in gfx_v11_0_handle_priv_fault()
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| /linux/drivers/gpu/drm/radeon/ |
| H A D | cik.c | 7545 u8 me_id, pipe_id, queue_id; in cik_irq_process() local 7931 me_id = (ring_id & 0x60) >> 5; in cik_irq_process() 7934 switch (me_id) { in cik_irq_process() 7940 if ((cp1_ring->me == me_id) & (cp1_ring->pipe == pipe_id)) in cik_irq_process() 7942 if ((cp2_ring->me == me_id) & (cp2_ring->pipe == pipe_id)) in cik_irq_process() 7950 me_id = (ring_id & 0x60) >> 5; in cik_irq_process() 7951 switch (me_id) { in cik_irq_process() 7971 me_id = (ring_id & 0x60) >> 5; in cik_irq_process() 7972 switch (me_id) { in cik_irq_process() 7991 me_id = (ring_id & 0x3) >> 0; in cik_irq_process() [all …]
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