Searched refs:max_uclk_mhz (Results 1 – 4 of 4) sorted by relevance
132 max_uclk_mhz = 0, max_socclk_mhz = 0; in dml2_policy_build_synthetic_soc_states() local143 if (p->in_states->state_array[i].dram_speed_mts > max_uclk_mhz) in dml2_policy_build_synthetic_soc_states()144 max_uclk_mhz = (int) p->in_states->state_array[i].dram_speed_mts; in dml2_policy_build_synthetic_soc_states()224 p->out_states->state_array[i].dram_speed_mts > max_uclk_mhz) in dml2_policy_build_synthetic_soc_states()
566 max_dtbclk_mhz = 0, max_fclk_mhz = 0, max_uclk_mhz = 0, max_socclk_mhz = 0; in dml2_init_soc_states() local575 if (p->in_states->state_array[i].dram_speed_mts > max_uclk_mhz) in dml2_init_soc_states()576 max_uclk_mhz = (int)p->in_states->state_array[i].dram_speed_mts; in dml2_init_soc_states()
2674 max_phyclk_mhz = 0, max_dtbclk_mhz = 0, max_fclk_mhz = 0, max_uclk_mhz = 0; in dcn32_patch_dpm_table() local2681 if (bw_params->clk_table.entries[i].memclk_mhz > max_uclk_mhz) in dcn32_patch_dpm_table()2682 max_uclk_mhz = bw_params->clk_table.entries[i].memclk_mhz; in dcn32_patch_dpm_table()2705 if (max_uclk_mhz == 0) in dcn32_patch_dpm_table()
10407 double max_uclk_mhz = 0; in dml_core_mode_programming() local12038 …max_uclk_mhz = mode_lib->soc.clk_table.uclk.clk_values_khz[mode_lib->soc.clk_table.uclk.num_clk_va… in dml_core_mode_programming()12039 …min_return_latency_in_DCFCLK_cycles = (min_return_uclk_cycles / max_uclk_mhz + min_return_fclk_cyc… in dml_core_mode_programming()12046 DML_LOG_VERBOSE("DML::%s: max_uclk_mhz = %f\n", __func__, max_uclk_mhz); in dml_core_mode_programming()