Home
last modified time | relevance | path

Searched refs:lane_status (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/hisilicon/hibmc/dp/
H A Ddp_link.c139 u8 lane_status[DP_LINK_STATUS_SIZE]) in hibmc_dp_link_get_adjust_train()
145 train_set[lane] = drm_dp_get_adjust_request_voltage(lane_status, lane) | in hibmc_dp_link_get_adjust_train()
146 drm_dp_get_adjust_request_pre_emphasis(lane_status, lane); in hibmc_dp_link_get_adjust_train()
200 u8 lane_status[DP_LINK_STATUS_SIZE] = {0}; in hibmc_dp_link_training_cr() local
215 ret = drm_dp_dpcd_read_link_status(dp->aux, lane_status); in hibmc_dp_link_training_cr()
221 if (drm_dp_clock_recovery_ok(lane_status, dp->link.cap.lanes)) { in hibmc_dp_link_training_cr()
233 level_changed = hibmc_dp_link_get_adjust_train(dp, lane_status); in hibmc_dp_link_training_cr()
257 u8 lane_status[DP_LINK_STATUS_SIZE] = {0}; in hibmc_dp_link_training_channel_eq() local
268 ret = drm_dp_dpcd_read_link_status(dp->aux, lane_status); in hibmc_dp_link_training_channel_eq()
274 if (!drm_dp_clock_recovery_ok(lane_status, dp->link.cap.lanes)) { in hibmc_dp_link_training_channel_eq()
[all …]
/linux/drivers/net/ethernet/sfc/falcon/
H A Dmdio_10g.h42 int i, lane_status; in ef4_mdio_phyxgxs_lane_sync() local
46 lane_status = ef4_mdio_read(efx, MDIO_MMD_PHYXS, in ef4_mdio_phyxgxs_lane_sync()
49 sync = !!(lane_status & MDIO_PHYXS_LNSTAT_ALIGN); in ef4_mdio_phyxgxs_lane_sync()
52 lane_status); in ef4_mdio_phyxgxs_lane_sync()
/linux/drivers/gpu/drm/amd/display/dc/link/protocols/
H A Dlink_dp_training.h83 union lane_status ln_status[LANE_COUNT_DP_MAX],
141 union lane_status *dpcd_lane_status);
144 union lane_status *dpcd_lane_status);
146 union lane_status *dpcd_lane_status);
157 union lane_status *dpcd_lane_status);
H A Dlink_dp_training.c442 union lane_status *dpcd_lane_status) in dp_get_cr_failure()
478 union lane_status *dpcd_lane_status) in dp_is_cr_done()
492 union lane_status *dpcd_lane_status) in dp_is_ch_eq_done()
503 union lane_status *dpcd_lane_status) in dp_is_symbol_locked()
558 union lane_status lane_status; in dp_check_link_loss_status() local
574 lane_status.raw = dp_get_nibble_at_index(&dpcd_buf[2], lane); in dp_check_link_loss_status()
577 if (!lane_status.bits.CHANNEL_EQ_DONE_0 || in dp_check_link_loss_status()
578 !lane_status.bits.CR_DONE_0 || in dp_check_link_loss_status()
579 !lane_status.bits.SYMBOL_LOCKED_0 || in dp_check_link_loss_status()
597 union lane_status ln_status[LANE_COUNT_DP_MAX], in dp_get_lane_status_and_lane_adjust()
[all …]
H A Dlink_dp_training_128b_132b.c80 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX] = {0}; in dp_perform_128b_132b_channel_eq_done_sequence()
165 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX] = {0}; in dp_perform_128b_132b_cds_done_sequence()
H A Dlink_dp_training_dpia.c300 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX] = {0}; in dpia_training_cr_non_transparent()
466 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX] = {0}; in dpia_training_cr_transparent()
596 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX] = {0}; in dpia_training_eq_non_transparent()
740 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX] = {0}; in dpia_training_eq_transparent()
H A Dlink_dp_training_8b_10b.c231 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX]; in perform_8b_10b_clock_recovery_sequence()
352 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX] = {0}; in perform_8b_10b_channel_equalization_sequence()
/linux/drivers/gpu/drm/bridge/analogix/
H A Danalogix_dp_core.c307 u8 lane_status; in analogix_dp_clock_recovery_ok() local
310 lane_status = analogix_dp_get_lane_status(link_status, lane); in analogix_dp_clock_recovery_ok()
311 if ((lane_status & DP_LANE_CR_DONE) == 0) in analogix_dp_clock_recovery_ok()
321 u8 lane_status; in analogix_dp_channel_eq_ok() local
327 lane_status = analogix_dp_get_lane_status(link_status, lane); in analogix_dp_channel_eq_ok()
328 lane_status &= DP_CHANNEL_EQ_BITS; in analogix_dp_channel_eq_ok()
329 if (lane_status != DP_CHANNEL_EQ_BITS) in analogix_dp_channel_eq_ok()
/linux/drivers/gpu/drm/gma500/
H A Dcdv_intel_dp.c1317 uint8_t lane_status; in cdv_intel_clock_recovery_ok() local
1320 lane_status = cdv_intel_get_lane_status(link_status, lane); in cdv_intel_clock_recovery_ok()
1321 if ((lane_status & DP_LANE_CR_DONE) == 0) in cdv_intel_clock_recovery_ok()
1336 uint8_t lane_status; in cdv_intel_channel_eq_ok() local
1344 lane_status = cdv_intel_get_lane_status(intel_dp->link_status, lane); in cdv_intel_channel_eq_ok()
1345 if ((lane_status & CHANNEL_EQ_BITS) != CHANNEL_EQ_BITS) in cdv_intel_channel_eq_ok()
/linux/drivers/gpu/drm/amd/display/dc/link/
H A Dlink_dpms.c1180 union lane_status *status, in get_lane_status()
1213 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX]; in poll_for_allocation_change_trigger()