Searched refs:intr_en (Results 1 – 11 of 11) sorted by relevance
39 unsigned int intr_en; member230 host->intr_en &= MVSD_NOR_CARD_INT; in mvsd_request()231 host->intr_en |= intr | MVSD_NOR_ERROR; in mvsd_request()232 mvsd_write(MVSD_NOR_INTR_EN, host->intr_en); in mvsd_request()374 (intr_status & host->intr_en & in mvsd_irq()405 host->intr_en &= in mvsd_irq()407 mvsd_write(MVSD_NOR_INTR_EN, host->intr_en); in mvsd_irq()408 } else if (host->intr_en & MVSD_NOR_RX_FIFO_8W) { in mvsd_irq()409 host->intr_en &= ~MVSD_NOR_RX_FIFO_8W; in mvsd_irq()410 host->intr_en |= MVSD_NOR_RX_READY; in mvsd_irq()[all …]
51 bool intr_en; member166 data->intr_en = state; in apds9300_set_intr_state()318 return data->intr_en; in apds9300_read_interrupt_config()
173 u32 intr_en = readl(ioaddr + DMA_CHAN_INTR_ENA(dwmac4_addrs, chan)); in dwmac4_dma_interrupt() local222 writel(intr_status & intr_en, in dwmac4_dma_interrupt()
308 u32 intr_en = readl(ioaddr + XGMAC_DMA_CH_INT_EN(chan)); in dwxgmac2_dma_interrupt() local347 writel(intr_en & intr_status, ioaddr + XGMAC_DMA_CH_STATUS(chan)); in dwxgmac2_dma_interrupt()
436 if (attr->intr_en) { in hinic3_set_ci_table()437 cons_idx_attr.intr_en = attr->intr_en; in hinic3_set_ci_table()
32 u8 intr_en; member
90 u8 intr_en; member
867 sq_attr.intr_en = 1; in hinic3_init_qp_ctxts()
232 u32 intr_en:1; member
479 static void threshold_restart_bank(unsigned int bank, bool intr_en) in threshold_restart_bank() argument492 tr.b->interrupt_enable = intr_en; in threshold_restart_bank()
315 bool intr_en; member1592 stc->oc_cfg.intr_en = 1; in soctherm_oc_cfg_parse()1887 soctherm_oc_intr_enable(ts, throt, oc->intr_en); in soctherm_oc_cfg_program()