Home
last modified time | relevance | path

Searched refs:intel_uncore_read_fw (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/i915/
H A Dintel_uncore.h425 #define intel_uncore_read_fw(...) __raw_uncore_read32(__VA_ARGS__) macro
428 #define intel_uncore_posting_read_fw(...) ((void)intel_uncore_read_fw(__VA_ARGS__))
446 old = intel_uncore_read_fw(uncore, reg); in intel_uncore_rmw_fw()
469 upper = intel_uncore_read_fw(uncore, upper_reg); in intel_uncore_read64_2x32()
472 lower = intel_uncore_read_fw(uncore, lower_reg); in intel_uncore_read64_2x32()
473 upper = intel_uncore_read_fw(uncore, upper_reg); in intel_uncore_read64_2x32()
H A Dintel_pcode.c71 if (intel_uncore_read_fw(uncore, GEN6_PCODE_MAILBOX) & GEN6_PCODE_READY) in __snb_pcode_rw()
88 *val = intel_uncore_read_fw(uncore, GEN6_PCODE_DATA); in __snb_pcode_rw()
90 *val1 = intel_uncore_read_fw(uncore, GEN6_PCODE_DATA1); in __snb_pcode_rw()
H A Dvlv_iosf_sb.c123 *val = intel_uncore_read_fw(uncore, VLV_IOSF_DATA); in vlv_sideband_rw()
H A Di915_gpu_error.c1930 gt->forcewake = intel_uncore_read_fw(uncore, FORCEWAKE_VLV); in gt_record_global_regs()
1953 gt->forcewake = intel_uncore_read_fw(uncore, FORCEWAKE); in gt_record_global_regs()
1960 gt->forcewake = intel_uncore_read_fw(uncore, FORCEWAKE_MT); in gt_record_global_regs()
H A Dintel_uncore.c2736 #define done (((reg_value = intel_uncore_read_fw(uncore, reg)) & mask) == value) in __intel_wait_for_register_fw()
/linux/drivers/gpu/drm/i915/gt/
H A Dintel_gt_mcr.c247 mcr = intel_uncore_read_fw(uncore, GEN8_MCR_SELECTOR); in rw_with_mcr_steering_fw()
257 mcr = intel_uncore_read_fw(uncore, GEN8_MCR_SELECTOR); in rw_with_mcr_steering_fw()
266 val = intel_uncore_read_fw(uncore, mcr_reg_cast(reg)); in rw_with_mcr_steering_fw()
356 err = wait_for(intel_uncore_read_fw(gt->uncore, in intel_gt_mcr_lock()
710 return intel_uncore_read_fw(gt->uncore, mcr_reg_cast(reg)); in intel_gt_mcr_read_any_fw()
H A Dselftest_rc6.c118 intel_uncore_read_fw(gt->uncore, GEN6_RC_STATE), in live_rc6_manual()
119 intel_uncore_read_fw(gt->uncore, GEN6_RC_CONTROL), in live_rc6_manual()
H A Dintel_rc6.c765 upper = intel_uncore_read_fw(uncore, reg); in vlv_residency_raw()
771 lower = intel_uncore_read_fw(uncore, reg); in vlv_residency_raw()
775 upper = intel_uncore_read_fw(uncore, reg); in vlv_residency_raw()
822 time_hw = intel_uncore_read_fw(uncore, reg); in intel_rc6_residency_ns()
H A Dintel_reset.c432 if (!(intel_uncore_read_fw(uncore, sfc_lock.usage_reg) & sfc_lock.usage_bit)) { in gen11_lock_sfc()
446 if (!(intel_uncore_read_fw(uncore, in gen11_lock_sfc()
486 lock_obtained = (intel_uncore_read_fw(uncore, sfc_lock.usage_reg) & in gen11_lock_sfc()
570 ack = intel_uncore_read_fw(uncore, reg); in gen8_engine_reset_prepare()
596 intel_uncore_read_fw(uncore, reg)); in gen8_engine_reset_prepare()
H A Dintel_workarounds.c1033 intel_uncore_read_fw(uncore, wa->reg); in intel_engine_emit_ctx_wa()
1782 intel_uncore_read_fw(uncore, wa->reg); in wa_list_apply()
1794 intel_uncore_read_fw(uncore, wa->reg); in wa_list_apply()
1830 intel_uncore_read_fw(uncore, wa->reg), in wa_list_verify()
H A Dintel_ggtt.c198 intel_uncore_read_fw(uncore, GFX_FLSH_CNTL_GEN6); in gen6_ggtt_invalidate()
/linux/drivers/gpu/drm/i915/gvt/
H A Dmmio_context.c198 intel_uncore_read_fw(uncore, offset); in load_render_mocs()
206 intel_uncore_read_fw(uncore, offset); in load_render_mocs()
400 if (wait_for_atomic(intel_uncore_read_fw(uncore, reg) == 0, 50)) in handle_tlb_pending_event()
512 intel_uncore_read_fw(uncore, mmio->reg); in switch_mmio()
519 intel_uncore_read_fw(uncore, mmio->reg); in switch_mmio()
/linux/drivers/gpu/drm/i915/display/
H A Dintel_de.h193 val = intel_uncore_read_fw(__to_uncore(display), reg); in intel_de_read_fw()