| /linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_gmbus.c | 414 intel_de_write_fw(display, GMBUS4(display), irq_en); in gmbus_wait() 426 intel_de_write_fw(display, GMBUS4(display), 0); in gmbus_wait() 448 intel_de_write_fw(display, GMBUS4(display), irq_enable); in gmbus_wait_idle() 452 intel_de_write_fw(display, GMBUS4(display), 0); in gmbus_wait_idle() 483 intel_de_write_fw(display, GMBUS0(display), in gmbus_xfer_read_chunk() 487 intel_de_write_fw(display, GMBUS1(display), in gmbus_xfer_read_chunk() 510 intel_de_write_fw(display, GMBUS0(display), gmbus0_reg); in gmbus_xfer_read_chunk() 567 intel_de_write_fw(display, GMBUS3(display), val); in gmbus_xfer_write_chunk() 568 intel_de_write_fw(display, GMBUS1(display), in gmbus_xfer_write_chunk() 578 intel_de_write_fw(display, GMBUS3(display), val); in gmbus_xfer_write_chunk() [all …]
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| H A D | intel_sbi.c | 30 intel_de_write_fw(display, SBI_ADDR, SBI_ADDR_VALUE(reg)); in intel_sbi_rw() 31 intel_de_write_fw(display, SBI_DATA, is_read ? 0 : *val); in intel_sbi_rw() 39 intel_de_write_fw(display, SBI_CTL_STAT, cmd | SBI_STATUS_BUSY); in intel_sbi_rw()
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| H A D | intel_dsb.c | 889 intel_de_write_fw(display, DSB_CTRL(pipe, dsb->id), in intel_dsb_commit() 892 intel_de_write_fw(display, DSB_CHICKEN(pipe, dsb->id), in intel_dsb_commit() 895 intel_de_write_fw(display, DSB_INTERRUPT(pipe, dsb->id), in intel_dsb_commit() 899 intel_de_write_fw(display, DSB_PMCTRL(pipe, dsb->id), 0); in intel_dsb_commit() 901 intel_de_write_fw(display, DSB_HEAD(pipe, dsb->id), in intel_dsb_commit() 904 intel_de_write_fw(display, DSB_TAIL(pipe, dsb->id), in intel_dsb_commit() 922 intel_de_write_fw(display, DSB_CTRL(pipe, dsb->id), in intel_dsb_wait() 941 intel_de_write_fw(display, DSB_CTRL(pipe, dsb->id), 0); in intel_dsb_wait() 943 intel_de_write_fw(display, DSB_INTERRUPT(pipe, dsb->id), in intel_dsb_wait() 1035 intel_de_write_fw(display, DSB_INTERRUPT(pipe, dsb_id), tmp); in intel_dsb_irq_handler()
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| H A D | intel_color.c | 654 intel_de_write_fw(display, PIPE_WGC_C01_C00(display, pipe), in vlv_load_wgc_csc() 656 intel_de_write_fw(display, PIPE_WGC_C02(display, pipe), in vlv_load_wgc_csc() 659 intel_de_write_fw(display, PIPE_WGC_C11_C10(display, pipe), in vlv_load_wgc_csc() 661 intel_de_write_fw(display, PIPE_WGC_C12(display, pipe), in vlv_load_wgc_csc() 664 intel_de_write_fw(display, PIPE_WGC_C21_C20(display, pipe), in vlv_load_wgc_csc() 666 intel_de_write_fw(display, PIPE_WGC_C22(display, pipe), in vlv_load_wgc_csc() 756 intel_de_write_fw(display, CGM_PIPE_CSC_COEFF01(pipe), in chv_load_cgm_csc() 758 intel_de_write_fw(display, CGM_PIPE_CSC_COEFF23(pipe), in chv_load_cgm_csc() 760 intel_de_write_fw(display, CGM_PIPE_CSC_COEFF45(pipe), in chv_load_cgm_csc() 762 intel_de_write_fw(display, CGM_PIPE_CSC_COEFF67(pipe), in chv_load_cgm_csc() [all …]
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| H A D | intel_pfit.c | 590 intel_de_write_fw(display, PF_CTL(pipe), PF_ENABLE | in ilk_pfit_enable() 593 intel_de_write_fw(display, PF_CTL(pipe), PF_ENABLE | in ilk_pfit_enable() 595 intel_de_write_fw(display, PF_WIN_POS(pipe), in ilk_pfit_enable() 597 intel_de_write_fw(display, PF_WIN_SZ(pipe), in ilk_pfit_enable() 614 intel_de_write_fw(display, PF_CTL(pipe), 0); in ilk_pfit_disable() 615 intel_de_write_fw(display, PF_WIN_POS(pipe), 0); in ilk_pfit_disable() 616 intel_de_write_fw(display, PF_WIN_SZ(pipe), 0); in ilk_pfit_disable()
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| H A D | skl_scaler.c | 794 intel_de_write_fw(display, SKL_PS_CTRL(pipe, id), ps_ctrl); in skl_scaler_setup_casf() 795 intel_de_write_fw(display, SKL_PS_WIN_POS(pipe, id), in skl_scaler_setup_casf() 797 intel_de_write_fw(display, SKL_PS_WIN_SZ(pipe, id), in skl_scaler_setup_casf() 849 intel_de_write_fw(display, SKL_PS_CTRL(pipe, id), ps_ctrl); in skl_pfit_enable() 851 intel_de_write_fw(display, SKL_PS_VPHASE(pipe, id), in skl_pfit_enable() 853 intel_de_write_fw(display, SKL_PS_HPHASE(pipe, id), in skl_pfit_enable() 855 intel_de_write_fw(display, SKL_PS_WIN_POS(pipe, id), in skl_pfit_enable() 857 intel_de_write_fw(display, SKL_PS_WIN_SZ(pipe, id), in skl_pfit_enable() 1033 intel_de_write_fw(display, in adl_scaler_ecc_unmask()
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| H A D | intel_de.h | 200 intel_de_write_fw(struct intel_display *display, i915_reg_t reg, u32 val) in intel_de_write_fw() function 213 intel_de_write_fw(display, reg, val); in intel_de_rmw_fw() 237 intel_de_write_fw(display, reg, val); in intel_de_write_dsb()
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| H A D | intel_casf.c | 90 intel_de_write_fw(display, SKL_PS_WIN_SZ(crtc->pipe, 1), win_size); in intel_casf_update_strength() 202 intel_de_write_fw(display, GLK_PS_COEF_INDEX_SET(crtc->pipe, id, 0), in intel_casf_write_coeff() 215 intel_de_write_fw(display, GLK_PS_COEF_DATA_SET(crtc->pipe, id, 0), in intel_casf_write_coeff()
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| H A D | intel_display_irq.c | 998 intel_de_write_fw(display, DEIER, *de_ier & ~DE_MASTER_IRQ_CONTROL); in ilk_display_irq_master_disable() 1009 intel_de_write_fw(display, SDEIER, 0); in ilk_display_irq_master_disable() 1017 intel_de_write_fw(display, DEIER, de_ier); in ilk_display_irq_master_enable() 1020 intel_de_write_fw(display, SDEIER, sde_ier); in ilk_display_irq_master_enable() 1030 intel_de_write_fw(display, DEIIR, de_iir); in ilk_display_irq_handler()
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| H A D | intel_fbc.c | 385 intel_de_write_fw(display, DSPADDR(display, i9xx_plane), in i8xx_fbc_nuke() 422 intel_de_write_fw(display, DSPSURF(display, i9xx_plane), in i965_fbc_nuke()
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| H A D | intel_dmc.c | 668 intel_de_write_fw(display, in dmc_load_program()
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| H A D | intel_psr.c | 3072 intel_de_write_fw(display, PSR2_MAN_TRK_CTL(display, cpu_transcoder), val); in intel_psr2_panic_force_full_update() 3077 intel_de_write_fw(display, PIPE_SRCSZ_ERLY_TPT(crtc->pipe), 0); in intel_psr2_panic_force_full_update()
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