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Searched refs:i915_ggtt_offset (Results 1 – 25 of 39) sorted by relevance

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/linux/drivers/gpu/drm/i915/gem/selftests/
H A Di915_gem_coherency.c224 *cs++ = lower_32_bits(i915_ggtt_offset(vma) + offset); in gpu_set()
225 *cs++ = upper_32_bits(i915_ggtt_offset(vma) + offset); in gpu_set()
230 *cs++ = i915_ggtt_offset(vma) + offset; in gpu_set()
234 *cs++ = i915_ggtt_offset(vma) + offset; in gpu_set()
/linux/drivers/gpu/drm/i915/selftests/
H A Di915_perf.c245 i915_ggtt_offset(stream->noa_wait), 0, in live_noa_delay()
352 i915_ggtt_offset(stream->noa_wait), 0, in live_noa_gpr()
378 *cs++ = i915_ggtt_offset(rq->engine->status_page.vma) + in live_noa_gpr()
/linux/drivers/gpu/drm/i915/gt/
H A Dselftest_lrc.c82 i915_ggtt_offset(ce->engine->status_page.vma) + in emit_semaphore_signal()
446 *cs++ = i915_ggtt_offset(scratch) + RING_START_IDX * sizeof(u32); in __live_lrc_state()
449 expected[RING_START_IDX] = i915_ggtt_offset(ce->ring->vma); in __live_lrc_state()
453 *cs++ = i915_ggtt_offset(scratch) + RING_TAIL_IDX * sizeof(u32); in __live_lrc_state()
568 i915_ggtt_offset(ce->engine->status_page.vma) + in __gpr_read()
599 *cs++ = i915_ggtt_offset(scratch) + n * sizeof(u32); in __gpr_read()
741 i915_ggtt_offset(ce->engine->status_page.vma) + in create_timestamp()
1117 *cs++ = i915_ggtt_offset(ce->engine->status_page.vma) + in record_registers()
1250 *cs++ = i915_ggtt_offset(ce->engine->status_page.vma) + in poison_registers()
1598 *cs++ = i915_ggtt_offset(ce->state) + in emit_wabb_ctx_canary()
H A Dintel_timeline.c210 i915_ggtt_offset(tl->hwsp_ggtt) + in intel_timeline_pin()
318 tl->hwsp_offset = i915_ggtt_offset(tl->hwsp_ggtt) + next_ofs; in __intel_timeline_get_seqno()
355 *hwsp = i915_ggtt_offset(tl->hwsp_ggtt) + in intel_timeline_read_hwsp()
H A Dintel_context_sseu.c27 offset = i915_ggtt_offset(ce->state) + in gen8_emit_rpcs_config()
H A Dselftest_mocs.c235 offset = i915_ggtt_offset(vma); in check_mocs_engine()
240 offset -= i915_ggtt_offset(vma); in check_mocs_engine()
H A Dintel_ring_submission.c141 set_hwsp(engine, i915_ggtt_offset(engine->status_page.vma)); in ring_setup_status_page()
226 ENGINE_WRITE_FW(engine, RING_START, i915_ggtt_offset(ring->vma)); in xcs_resume()
300 i915_ggtt_offset(ring->vma)); in xcs_resume()
797 *cs++ = i915_ggtt_offset(engine->kernel_context->state) | in mi_set_context()
804 *cs++ = i915_ggtt_offset(ce->state) | flags; in mi_set_context()
H A Dselftest_timeline.c850 w->addr = i915_ggtt_offset(vma); in setup_watcher()
885 w->addr = i915_ggtt_offset(w->vma); in create_watcher()
899 GEM_BUG_ON(w->addr - i915_ggtt_offset(w->vma) > w->vma->size); in check_watcher()
912 end = (w->addr - i915_ggtt_offset(w->vma)) / sizeof(*w->map); in check_watcher()
H A Dintel_renderstate.c91 so->batch_offset = i915_ggtt_offset(so->vma); in render_state_setup()
H A Dintel_gt.h158 return i915_ggtt_offset(gt->scratch) + field; in intel_gt_scratch_offset()
H A Dgen8_engine_cs.c420 return (i915_ggtt_offset(engine->status_page.vma) + in preempt_address()
750 return i915_ggtt_offset(rq->context->state) + in hold_switchout_semaphore_offset()
H A Dselftest_execlists.c838 *cs++ = i915_ggtt_offset(vma) + 4 * idx; in emit_semaphore_chain()
843 *cs++ = i915_ggtt_offset(vma) + 4 * (idx - 1); in emit_semaphore_chain()
912 *cs++ = i915_ggtt_offset(vma) + 4 * (idx - 1); in release_queue()
1057 i915_ggtt_offset(ce->engine->status_page.vma) + in create_rewinder()
1623 *cs++ = i915_ggtt_offset(vma); in live_busywait_preempt()
1634 *cs++ = i915_ggtt_offset(vma); in live_busywait_preempt()
1673 *cs++ = i915_ggtt_offset(vma); in live_busywait_preempt()
3232 *cs++ = i915_ggtt_offset(global); in preempt_user()
4247 *cs++ = i915_ggtt_offset(scratch) + n * sizeof(u32); in preserved_virtual_engine()
H A Dselftest_engine_pm.c78 u32 offset = i915_ggtt_offset(engine->status_page.vma); in __measure_timestamps()
/linux/drivers/gpu/drm/i915/display/
H A Dintel_fbdev_fb.c80 (unsigned long)(ggtt->gmadr.start + i915_ggtt_offset(vma)); in intel_fbdev_fb_fill_info()
H A Dintel_dsb_buffer.c20 return i915_ggtt_offset(dsb_buf->vma); in intel_dsb_buffer_ggtt_offset()
H A Dintel_overlay.c856 iowrite32(i915_ggtt_offset(vma) + params->offset_Y, &regs->OBUF_0Y); in intel_overlay_do_put_image()
873 iowrite32(i915_ggtt_offset(vma) + params->offset_U, in intel_overlay_do_put_image()
875 iowrite32(i915_ggtt_offset(vma) + params->offset_V, in intel_overlay_do_put_image()
1381 overlay->flip_addr = i915_ggtt_offset(vma); in get_registers()
H A Dintel_fb_pin.c325 plane_state->surf = i915_ggtt_offset(plane_state->ggtt_vma) + in intel_plane_pin_fb()
/linux/drivers/gpu/drm/i915/
H A Di915_perf.c545 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma); in oa_buffer_check_unlocked()
736 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma); in gen8_append_oa_reports()
1046 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma); in gen7_append_oa_reports()
1385 i915_ggtt_offset(scratch)); in gen12_guc_sw_ctx_id()
1557 stream->specific_ctx_id = i915_ggtt_offset(ce->state); in oa_get_render_ctx_id()
1703 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma); in gen7_init_oa_buffer()
1748 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma); in gen8_init_oa_buffer()
1801 u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma); in gen12_init_oa_buffer()
1929 *cs++ = i915_ggtt_offset(stream->noa_wait) + offset + 4 * d; in save_restore_register()
2077 *cs++ = i915_ggtt_offset(vma) + (ts0 - batch) * 4; in alloc_noa_wait()
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H A Di915_hdcp_gsc.c194 addr_in = i915_ggtt_offset(gsc_context->vma); in intel_hdcp_gsc_msg_send()
H A Di915_vma.h173 static inline u32 i915_ggtt_offset(const struct i915_vma *vma) in i915_ggtt_offset() function
/linux/drivers/gpu/drm/i915/gt/uc/
H A Dintel_gsc_fw.c265 u32 offset = i915_ggtt_offset(gsc->local); in emit_gsc_fw_load()
406 offset = i915_ggtt_offset(vma); in gsc_fw_query_compatibility_version()
H A Dintel_huc_fw.c42 pkt_offset = i915_ggtt_offset(huc->heci_pkt); in intel_huc_fw_auth_via_gsccs()
H A Dintel_guc.h419 u32 offset = i915_ggtt_offset(vma); in intel_guc_ggtt_offset()
H A Dintel_gsc_proxy.c129 u64 addr_in = i915_ggtt_offset(gsc->proxy.vma); in proxy_send_to_gsc()
/linux/drivers/gpu/drm/i915/gem/
H A Di915_gem_tiling.c175 if (!IS_ALIGNED(i915_ggtt_offset(vma), alignment)) in i915_vma_fence_prepare()

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