Searched refs:hw_plane (Results 1 – 3 of 3) sorted by relevance
| /linux/drivers/gpu/drm/tidss/ |
| H A D | tidss_dispc.c | 493 void dispc_vid_write(struct dispc_device *dispc, u32 hw_plane, u16 reg, u32 val) in dispc_vid_write() argument
495 void __iomem *base = dispc->base_vid[hw_plane]; in dispc_vid_write()
500 static u32 dispc_vid_read(struct dispc_device *dispc, u32 hw_plane, u16 reg) in dispc_vid_read() argument
502 void __iomem *base = dispc->base_vid[hw_plane]; in dispc_vid_read()
577 #define VID_REG_GET(dispc, hw_plane, idx, mask) \ argument
578 ((u32)FIELD_GET((mask), dispc_vid_read((dispc), (hw_plane), (idx))))
580 #define VID_REG_FLD_MOD(dispc, hw_plane, idx, val, mask) \ argument
583 u32 _hw_plane = (hw_plane); \
645 static dispc_irq_t dispc_vid_irq_from_raw(u32 stat, u32 hw_plane) in dispc_vid_irq_from_raw() argument
650 vid_stat |= DSS_IRQ_PLANE_FIFO_UNDERFLOW(hw_plane); in dispc_vid_irq_from_raw()
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| H A D | tidss_dispc.h | 112 void dispc_ovr_set_plane(struct dispc_device *dispc, u32 hw_plane,
139 int dispc_plane_check(struct dispc_device *dispc, u32 hw_plane,
142 void dispc_plane_setup(struct dispc_device *dispc, u32 hw_plane,
145 void dispc_plane_enable(struct dispc_device *dispc, u32 hw_plane, bool enable);
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| H A D | tidss_plane.c | 41 u32 hw_plane = tplane->hw_plane_id; in tidss_plane_atomic_check() local
107 ret = dispc_plane_check(tidss->dispc, hw_plane, new_plane_state, in tidss_plane_atomic_check()
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