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Searched refs:gfx_table (Results 1 – 23 of 23) sorted by relevance

/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Daldebaran_ppt.c357 dpm_table = &dpm_context->dpm_tables.gfx_table; in aldebaran_get_dpm_ultimate_freq()
419 dpm_table = &dpm_context->dpm_tables.gfx_table; in aldebaran_set_default_dpm_table()
586 struct smu_dpm_table *gfx_table = &dpm_context->dpm_tables.gfx_table; in aldebaran_populate_umd_state_clk() local
592 pstate_table->gfxclk_pstate.min = SMU_DPM_TABLE_MIN(gfx_table); in aldebaran_populate_umd_state_clk()
593 pstate_table->gfxclk_pstate.peak = SMU_DPM_TABLE_MAX(gfx_table); in aldebaran_populate_umd_state_clk()
594 pstate_table->gfxclk_pstate.curr.min = SMU_DPM_TABLE_MIN(gfx_table); in aldebaran_populate_umd_state_clk()
595 pstate_table->gfxclk_pstate.curr.max = SMU_DPM_TABLE_MAX(gfx_table); in aldebaran_populate_umd_state_clk()
607 if (gfx_table->count > ALDEBARAN_UMD_PSTATE_GFXCLK_LEVEL && in aldebaran_populate_umd_state_clk()
611 gfx_table->dpm_levels[ALDEBARAN_UMD_PSTATE_GFXCLK_LEVEL].value; in aldebaran_populate_umd_state_clk()
822 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in aldebaran_emit_clk_levels()
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H A Dsmu_v13_0_6_ppt.c999 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v13_0_6_get_dpm_ultimate_freq()
1123 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v13_0_6_set_default_dpm_table()
1196 struct smu_dpm_table *gfx_table = &dpm_context->dpm_tables.gfx_table; in smu_v13_0_6_populate_umd_state_clk() local
1201 pstate_table->gfxclk_pstate.min = SMU_DPM_TABLE_MIN(gfx_table); in smu_v13_0_6_populate_umd_state_clk()
1202 pstate_table->gfxclk_pstate.peak = SMU_DPM_TABLE_MAX(gfx_table); in smu_v13_0_6_populate_umd_state_clk()
1203 pstate_table->gfxclk_pstate.curr.min = SMU_DPM_TABLE_MIN(gfx_table); in smu_v13_0_6_populate_umd_state_clk()
1204 pstate_table->gfxclk_pstate.curr.max = SMU_DPM_TABLE_MAX(gfx_table); in smu_v13_0_6_populate_umd_state_clk()
1216 if (gfx_table->count > SMU_13_0_6_UMD_PSTATE_GFXCLK_LEVEL && in smu_v13_0_6_populate_umd_state_clk()
1220 gfx_table->dpm_levels[SMU_13_0_6_UMD_PSTATE_GFXCLK_LEVEL].value; in smu_v13_0_6_populate_umd_state_clk()
1404 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in smu_v13_0_6_emit_clk_levels()
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H A Daldebaran_ppt.h61 struct aldebaran_single_dpm_table gfx_table; member
H A Dsmu_v13_0_7_ppt.c614 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v13_0_7_set_default_dpm_table()
886 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v13_0_7_get_dpm_ultimate_freq()
1232 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in smu_v13_0_7_emit_clk_levels()
1968 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in smu_v13_0_7_force_clk_levels()
2272 struct smu_dpm_table *gfx_table = &dpm_context->dpm_tables.gfx_table; in smu_v13_0_7_populate_umd_state_clk() local
2285 pstate_table->gfxclk_pstate.min = SMU_DPM_TABLE_MIN(gfx_table); in smu_v13_0_7_populate_umd_state_clk()
2287 (driver_clocks.GameClockAc < SMU_DPM_TABLE_MAX(gfx_table))) in smu_v13_0_7_populate_umd_state_clk()
2290 pstate_table->gfxclk_pstate.peak = SMU_DPM_TABLE_MAX(gfx_table); in smu_v13_0_7_populate_umd_state_clk()
2308 driver_clocks.BaseClockAc < SMU_DPM_TABLE_MAX(gfx_table)) in smu_v13_0_7_populate_umd_state_clk()
2312 SMU_DPM_TABLE_MAX(gfx_table); in smu_v13_0_7_populate_umd_state_clk()
H A Dsmu_v13_0_0_ppt.c586 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v13_0_0_set_default_dpm_table()
876 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v13_0_0_get_dpm_ultimate_freq()
1222 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in smu_v13_0_0_emit_clk_levels()
1958 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in smu_v13_0_0_force_clk_levels()
2270 struct smu_dpm_table *gfx_table = &dpm_context->dpm_tables.gfx_table; in smu_v13_0_0_populate_umd_state_clk() local
2283 pstate_table->gfxclk_pstate.min = SMU_DPM_TABLE_MIN(gfx_table); in smu_v13_0_0_populate_umd_state_clk()
2285 (driver_clocks.GameClockAc < SMU_DPM_TABLE_MAX(gfx_table))) in smu_v13_0_0_populate_umd_state_clk()
2288 pstate_table->gfxclk_pstate.peak = SMU_DPM_TABLE_MAX(gfx_table); in smu_v13_0_0_populate_umd_state_clk()
2306 driver_clocks.BaseClockAc < SMU_DPM_TABLE_MAX(gfx_table)) in smu_v13_0_0_populate_umd_state_clk()
2310 SMU_DPM_TABLE_MAX(gfx_table); in smu_v13_0_0_populate_umd_state_clk()
H A Dsmu_v13_0.c1587 struct smu_dpm_table *gfx_table = &dpm_context->dpm_tables.gfx_table; in smu_v13_0_set_performance_level() local
1607 sclk_min = sclk_max = SMU_DPM_TABLE_MAX(gfx_table); in smu_v13_0_set_performance_level()
1615 sclk_min = sclk_max = SMU_DPM_TABLE_MIN(gfx_table); in smu_v13_0_set_performance_level()
1623 sclk_min = SMU_DPM_TABLE_MIN(gfx_table); in smu_v13_0_set_performance_level()
1624 sclk_max = SMU_DPM_TABLE_MAX(gfx_table); in smu_v13_0_set_performance_level()
/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega20_hwmgr.c600 dpm_table = &(data->dpm_table.gfx_table); in vega20_setup_gfxclk_dpm_table()
666 dpm_table = &(data->dpm_table.gfx_table); in vega20_setup_default_dpm_tables()
1481 &(data->dpm_table.gfx_table); in vega20_get_sclk_od()
1483 &(data->golden_dpm_table.gfx_table); in vega20_get_sclk_od()
1500 &(data->golden_dpm_table.gfx_table); in vega20_set_sclk_od()
1571 struct vega20_single_dpm_table *gfx_table = &(data->dpm_table.gfx_table); in vega20_populate_umdpstate_clocks() local
1574 if (gfx_table->count > VEGA20_UMD_PSTATE_GFXCLK_LEVEL && in vega20_populate_umdpstate_clocks()
1576 hwmgr->pstate_sclk = gfx_table->dpm_levels[VEGA20_UMD_PSTATE_GFXCLK_LEVEL].value; in vega20_populate_umdpstate_clocks()
1579 hwmgr->pstate_sclk = gfx_table->dpm_levels[0].value; in vega20_populate_umdpstate_clocks()
1583 hwmgr->pstate_sclk_peak = gfx_table->dpm_levels[gfx_table->count - 1].value; in vega20_populate_umdpstate_clocks()
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H A Dvega12_hwmgr.c667 dpm_table = &(data->dpm_table.gfx_table); in vega12_setup_default_dpm_tables()
788 struct vega12_single_dpm_table *dpm_table = &(data->dpm_table.gfx_table);
1041 struct vega12_single_dpm_table *gfx_dpm_table = &(data->dpm_table.gfx_table); in vega12_populate_umdpstate_clocks()
1166 min_freq = data->dpm_table.gfx_table.dpm_state.soft_min_level; in vega12_upload_dpm_min_level()
1257 max_freq = data->dpm_table.gfx_table.dpm_state.soft_max_level; in vega12_upload_dpm_max_level()
1661 soft_level = vega12_find_highest_dpm_level(&(data->dpm_table.gfx_table)); in vega12_force_dpm_highest()
1663 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega12_force_dpm_highest()
1664 data->dpm_table.gfx_table.dpm_state.soft_max_level = in vega12_force_dpm_highest()
1665 data->dpm_table.gfx_table.dpm_levels[soft_level].value; in vega12_force_dpm_highest()
1690 soft_level = vega12_find_lowest_dpm_level(&(data->dpm_table.gfx_table)); in vega12_force_dpm_lowest()
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H A Dvega10_hwmgr.c1360 dpm_table = &(data->dpm_table.gfx_table); in vega10_setup_default_dpm_tables()
1732 struct vega10_single_dpm_table *dpm_table = &(data->dpm_table.gfx_table); in vega10_populate_all_graphic_levels()
3438 struct vega10_single_dpm_table *sclk_table = &(data->dpm_table.gfx_table); in vega10_find_dpm_states_clocks_in_dpm_table()
3494 for (count = 0; count < dpm_table->gfx_table.count; count++) in vega10_populate_and_upload_sclk_mclk_dpm_levels()
3495 dpm_table->gfx_table.dpm_levels[count].value = odn_clk_table->entries[count].clk; in vega10_populate_and_upload_sclk_mclk_dpm_levels()
3578 &(data->dpm_table.gfx_table), in vega10_trim_dpm_states()
3648 data->dpm_table.gfx_table.dpm_state.soft_min_level) { in vega10_upload_dpm_bootup_level()
3654 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega10_upload_dpm_bootup_level()
3706 data->dpm_table.gfx_table.dpm_state.soft_max_level) { in vega10_upload_dpm_max_level()
3711 data->dpm_table.gfx_table.dpm_state.soft_max_level = in vega10_upload_dpm_max_level()
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H A Dvega12_hwmgr.h126 struct vega12_single_dpm_table gfx_table; member
H A Dvega10_hwmgr.h148 struct vega10_single_dpm_table gfx_table; member
H A Dvega20_hwmgr.h179 struct vega20_single_dpm_table gfx_table; member
/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Darcturus_ppt.c380 dpm_table = &dpm_context->dpm_tables.gfx_table; in arcturus_set_default_dpm_table()
565 struct smu_dpm_table *gfx_table = &dpm_context->dpm_tables.gfx_table; in arcturus_populate_umd_state_clk() local
571 pstate_table->gfxclk_pstate.min = SMU_DPM_TABLE_MIN(gfx_table); in arcturus_populate_umd_state_clk()
572 pstate_table->gfxclk_pstate.peak = SMU_DPM_TABLE_MAX(gfx_table); in arcturus_populate_umd_state_clk()
580 if (gfx_table->count > ARCTURUS_UMD_PSTATE_GFXCLK_LEVEL && in arcturus_populate_umd_state_clk()
584 gfx_table->dpm_levels[ARCTURUS_UMD_PSTATE_GFXCLK_LEVEL].value; in arcturus_populate_umd_state_clk()
787 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in arcturus_emit_clk_levels()
894 freq = dpm_context->dpm_tables.gfx_table.dpm_levels[level].value; in arcturus_upload_dpm_level()
957 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in arcturus_force_clk_levels()
H A Darcturus_ppt.h61 struct arcturus_single_dpm_table gfx_table; member
H A Dsmu_v11_0.c1861 struct smu_dpm_table *gfx_table = &dpm_context->dpm_tables.gfx_table; in smu_v11_0_set_performance_level() local
1875 sclk_min = sclk_max = SMU_DPM_TABLE_MAX(gfx_table); in smu_v11_0_set_performance_level()
1880 sclk_min = sclk_max = SMU_DPM_TABLE_MIN(gfx_table); in smu_v11_0_set_performance_level()
1885 sclk_min = SMU_DPM_TABLE_MIN(gfx_table); in smu_v11_0_set_performance_level()
1886 sclk_max = SMU_DPM_TABLE_MAX(gfx_table); in smu_v11_0_set_performance_level()
H A Dnavi10_ppt.c986 dpm_table = &dpm_context->dpm_tables.gfx_table; in navi10_set_default_dpm_table()
1266 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in navi10_emit_clk_levels()
1461 struct smu_dpm_table *gfx_table = &dpm_context->dpm_tables.gfx_table; in navi10_populate_umd_state_clk() local
1469 pstate_table->gfxclk_pstate.min = SMU_DPM_TABLE_MIN(gfx_table); in navi10_populate_umd_state_clk()
1513 sclk_freq = gfx_table->dpm_levels[gfx_table->count - 1].value; in navi10_populate_umd_state_clk()
1524 if (SMU_DPM_TABLE_MAX(gfx_table) > NAVI10_UMD_PSTATE_PROFILING_GFXCLK && in navi10_populate_umd_state_clk()
H A Dsienna_cichlid_ppt.c982 dpm_table = &dpm_context->dpm_tables.gfx_table; in sienna_cichlid_set_default_dpm_table()
1291 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in sienna_cichlid_emit_clk_levels()
1451 struct smu_dpm_table *gfx_table = &dpm_context->dpm_tables.gfx_table; in sienna_cichlid_populate_umd_state_clk() local
1458 pstate_table->gfxclk_pstate.min = SMU_DPM_TABLE_MIN(gfx_table); in sienna_cichlid_populate_umd_state_clk()
1459 pstate_table->gfxclk_pstate.peak = SMU_DPM_TABLE_MAX(gfx_table); in sienna_cichlid_populate_umd_state_clk()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu14/
H A Dsmu_v14_0_2_ppt.c484 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v14_0_2_set_default_dpm_table()
762 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v14_0_2_get_dpm_ultimate_freq()
1051 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in smu_v14_0_2_emit_clk_levels()
1320 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in smu_v14_0_2_force_clk_levels()
1508 struct smu_dpm_table *gfx_table = &dpm_context->dpm_tables.gfx_table; in smu_v14_0_2_populate_umd_state_clk() local
1521 pstate_table->gfxclk_pstate.min = SMU_DPM_TABLE_MIN(gfx_table); in smu_v14_0_2_populate_umd_state_clk()
1523 (driver_clocks.GameClockAc < SMU_DPM_TABLE_MAX(gfx_table))) in smu_v14_0_2_populate_umd_state_clk()
1526 pstate_table->gfxclk_pstate.peak = SMU_DPM_TABLE_MAX(gfx_table); in smu_v14_0_2_populate_umd_state_clk()
1544 driver_clocks.BaseClockAc < SMU_DPM_TABLE_MAX(gfx_table)) in smu_v14_0_2_populate_umd_state_clk()
1548 SMU_DPM_TABLE_MAX(gfx_table); in smu_v14_0_2_populate_umd_state_clk()
H A Dsmu_v14_0.c1248 struct smu_dpm_table *gfx_table = &dpm_context->dpm_tables.gfx_table; in smu_v14_0_set_performance_level() local
1268 sclk_min = sclk_max = SMU_DPM_TABLE_MAX(gfx_table); in smu_v14_0_set_performance_level()
1276 sclk_min = sclk_max = SMU_DPM_TABLE_MIN(gfx_table); in smu_v14_0_set_performance_level()
1284 sclk_min = SMU_DPM_TABLE_MIN(gfx_table); in smu_v14_0_set_performance_level()
1285 sclk_max = SMU_DPM_TABLE_MAX(gfx_table); in smu_v14_0_set_performance_level()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu15/
H A Dsmu_v15_0.c1132 struct smu_15_0_dpm_table *gfx_table = in smu_v15_0_set_performance_level() local
1133 &dpm_context->dpm_tables.gfx_table; in smu_v15_0_set_performance_level()
1158 sclk_min = sclk_max = gfx_table->max; in smu_v15_0_set_performance_level()
1166 sclk_min = sclk_max = gfx_table->min; in smu_v15_0_set_performance_level()
1174 sclk_min = gfx_table->min; in smu_v15_0_set_performance_level()
1175 sclk_max = gfx_table->max; in smu_v15_0_set_performance_level()
/linux/drivers/gpu/drm/amd/pm/swsmu/inc/
H A Dsmu_v14_0.h72 struct smu_dpm_table gfx_table; member
H A Dsmu_v15_0.h90 struct smu_15_0_dpm_table gfx_table; member
H A Dsmu_v13_0.h77 struct smu_dpm_table gfx_table; member