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Searched refs:get_vupdate_offset_from_vsync (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn10/
H A Ddcn10_init.c80 .get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync,
H A Ddcn10_hwseq.c3958 int vupdate_pos = dc->hwss.get_vupdate_offset_from_vsync(pipe_ctx); in dcn10_calc_vupdate_position()
3982 vline_pos += dc->hwss.get_vupdate_offset_from_vsync(pipe_ctx); in dcn10_cal_vline_position()
4012 int start_line = dc->hwss.get_vupdate_offset_from_vsync(pipe_ctx); in dcn10_setup_vupdate_interrupt()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/
H A Ddcn201_init.c82 .get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync,
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn21/
H A Ddcn21_init.c95 .get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync,
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/
H A Ddcn20_init.c93 .get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync,
H A Ddcn20_hwseq.c2788 int start_line = dc->hwss.get_vupdate_offset_from_vsync(pipe_ctx); in dcn20_setup_vupdate_interrupt()
/linux/drivers/gpu/drm/amd/display/dc/hwss/
H A Dhw_sequencer.h1052 int (*get_vupdate_offset_from_vsync)(struct pipe_ctx *pipe_ctx); member
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
H A Ddcn401_hwseq.c3903 int start_line = dc->hwss.get_vupdate_offset_from_vsync(pipe_ctx); in dcn401_setup_vupdate_interrupt_sequence()