xref: /linux/drivers/net/ethernet/meta/fbnic/fbnic.h (revision 91a4855d6c03e770e42f17c798a36a3c46e63de2)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) Meta Platforms, Inc. and affiliates. */
3 
4 #ifndef _FBNIC_H_
5 #define _FBNIC_H_
6 
7 #include <linux/interrupt.h>
8 #include <linux/io.h>
9 #include <linux/ptp_clock_kernel.h>
10 #include <linux/types.h>
11 #include <linux/workqueue.h>
12 
13 #include "fbnic_csr.h"
14 #include "fbnic_fw.h"
15 #include "fbnic_fw_log.h"
16 #include "fbnic_hw_stats.h"
17 #include "fbnic_mac.h"
18 #include "fbnic_rpc.h"
19 
20 struct fbnic_napi_vector;
21 
22 #define FBNIC_MAX_NAPI_VECTORS		128u
23 #define FBNIC_MBX_CMPL_SLOTS		4
24 
25 struct fbnic_dev {
26 	struct device *dev;
27 	struct net_device *netdev;
28 	struct dentry *dbg_fbd;
29 	struct device *hwmon;
30 	struct devlink_health_reporter *fw_reporter;
31 	struct devlink_health_reporter *otp_reporter;
32 
33 	u32 __iomem *uc_addr0;
34 	u32 __iomem *uc_addr4;
35 	const struct fbnic_mac *mac;
36 	unsigned int fw_msix_vector;
37 	unsigned int mac_msix_vector;
38 	unsigned short num_irqs;
39 
40 	struct {
41 		u8 users;
42 		char name[IFNAMSIZ + 9];
43 	} napi_irq[FBNIC_MAX_NAPI_VECTORS];
44 
45 	struct delayed_work service_task;
46 
47 	struct fbnic_fw_mbx mbx[FBNIC_IPC_MBX_INDICES];
48 	struct fbnic_fw_cap fw_cap;
49 	struct fbnic_fw_completion *cmpl_data[FBNIC_MBX_CMPL_SLOTS];
50 	/* Lock protecting Tx Mailbox queue to prevent possible races */
51 	spinlock_t fw_tx_lock;
52 
53 	unsigned long last_heartbeat_request;
54 	unsigned long last_heartbeat_response;
55 	u8 fw_heartbeat_enabled;
56 
57 	u64 dsn;
58 	u32 mps;
59 	u32 readrq;
60 	u8 relaxed_ord;
61 
62 	/* Local copy of the devices TCAM */
63 	struct fbnic_act_tcam act_tcam[FBNIC_RPC_TCAM_ACT_NUM_ENTRIES];
64 	struct fbnic_mac_addr mac_addr[FBNIC_RPC_TCAM_MACDA_NUM_ENTRIES];
65 	u8 mac_addr_boundary;
66 	u8 tce_tcam_last;
67 
68 	/* IP TCAM */
69 	struct fbnic_ip_addr ip_src[FBNIC_RPC_TCAM_IP_ADDR_NUM_ENTRIES];
70 	struct fbnic_ip_addr ip_dst[FBNIC_RPC_TCAM_IP_ADDR_NUM_ENTRIES];
71 	struct fbnic_ip_addr ipo_src[FBNIC_RPC_TCAM_IP_ADDR_NUM_ENTRIES];
72 	struct fbnic_ip_addr ipo_dst[FBNIC_RPC_TCAM_IP_ADDR_NUM_ENTRIES];
73 
74 	/* Number of TCQs/RCQs available on hardware */
75 	u16 max_num_queues;
76 
77 	/* Lock protecting writes to @time_high, @time_offset of fbnic_netdev,
78 	 * and the HW time CSR machinery.
79 	 */
80 	spinlock_t time_lock;
81 	/* Externally accessible PTP clock, may be NULL */
82 	struct ptp_clock *ptp;
83 	struct ptp_clock_info ptp_info;
84 	/* Last @time_high refresh time in jiffies (to catch stalls) */
85 	unsigned long last_read;
86 
87 	/* PMD specific data */
88 	unsigned long end_of_pmd_training;
89 	u8 pmd_state;
90 
91 	/* Local copy of hardware statistics */
92 	struct fbnic_hw_stats hw_stats;
93 
94 	/* Firmware time since boot in milliseconds */
95 	u64 firmware_time;
96 	u64 prev_firmware_time;
97 
98 	struct fbnic_fw_log fw_log;
99 
100 	/* MDIO bus for PHYs */
101 	struct mii_bus *mdio_bus;
102 
103 	/* In units of ms since API supports values in ms */
104 	u16 ps_timeout;
105 };
106 
107 /* Reserve entry 0 in the MSI-X "others" array until we have filled all
108  * 32 of the possible interrupt slots. By doing this we can avoid any
109  * potential conflicts should we need to enable one of the debug interrupt
110  * causes later.
111  */
112 enum {
113 	FBNIC_FW_MSIX_ENTRY,
114 	FBNIC_PCS_MSIX_ENTRY,
115 	FBNIC_NON_NAPI_VECTORS
116 };
117 
118 static inline bool fbnic_present(struct fbnic_dev *fbd)
119 {
120 	return !!READ_ONCE(fbd->uc_addr0);
121 }
122 
123 static inline void fbnic_wr32(struct fbnic_dev *fbd, u32 reg, u32 val)
124 {
125 	u32 __iomem *csr = READ_ONCE(fbd->uc_addr0);
126 
127 	if (csr)
128 		writel(val, csr + reg);
129 }
130 
131 u32 fbnic_rd32(struct fbnic_dev *fbd, u32 reg);
132 
133 static inline void fbnic_wrfl(struct fbnic_dev *fbd)
134 {
135 	fbnic_rd32(fbd, FBNIC_MASTER_SPARE_0);
136 }
137 
138 static inline void
139 fbnic_rmw32(struct fbnic_dev *fbd, u32 reg, u32 mask, u32 val)
140 {
141 	u32 v;
142 
143 	v = fbnic_rd32(fbd, reg);
144 	v &= ~mask;
145 	v |= val;
146 	fbnic_wr32(fbd, reg, v);
147 }
148 
149 #define wr32(_f, _r, _v)	fbnic_wr32(_f, _r, _v)
150 #define rd32(_f, _r)		fbnic_rd32(_f, _r)
151 #define wrfl(_f)		fbnic_wrfl(_f)
152 
153 bool fbnic_fw_present(struct fbnic_dev *fbd);
154 u32 fbnic_fw_rd32(struct fbnic_dev *fbd, u32 reg);
155 void fbnic_fw_wr32(struct fbnic_dev *fbd, u32 reg, u32 val);
156 
157 #define fw_rd32(_f, _r)		fbnic_fw_rd32(_f, _r)
158 #define fw_wr32(_f, _r, _v)	fbnic_fw_wr32(_f, _r, _v)
159 #define fw_wrfl(_f)		fbnic_fw_rd32(_f, FBNIC_FW_ZERO_REG)
160 
161 static inline bool fbnic_bmc_present(struct fbnic_dev *fbd)
162 {
163 	return fbd->fw_cap.bmc_present;
164 }
165 
166 static inline bool fbnic_init_failure(struct fbnic_dev *fbd)
167 {
168 	return !fbd->netdev;
169 }
170 
171 extern char fbnic_driver_name[];
172 
173 void fbnic_devlink_free(struct fbnic_dev *fbd);
174 struct fbnic_dev *fbnic_devlink_alloc(struct pci_dev *pdev);
175 int fbnic_devlink_health_create(struct fbnic_dev *fbd);
176 void fbnic_devlink_health_destroy(struct fbnic_dev *fbd);
177 void fbnic_devlink_register(struct fbnic_dev *fbd);
178 void fbnic_devlink_unregister(struct fbnic_dev *fbd);
179 void __printf(2, 3)
180 fbnic_devlink_fw_report(struct fbnic_dev *fbd, const char *format, ...);
181 void fbnic_devlink_otp_check(struct fbnic_dev *fbd, const char *msg);
182 
183 int fbnic_fw_request_mbx(struct fbnic_dev *fbd);
184 void fbnic_fw_free_mbx(struct fbnic_dev *fbd);
185 
186 void fbnic_hwmon_register(struct fbnic_dev *fbd);
187 void fbnic_hwmon_unregister(struct fbnic_dev *fbd);
188 
189 int fbnic_mac_request_irq(struct fbnic_dev *fbd);
190 void fbnic_mac_free_irq(struct fbnic_dev *fbd);
191 
192 void fbnic_napi_name_irqs(struct fbnic_dev *fbd);
193 int fbnic_napi_request_irq(struct fbnic_dev *fbd,
194 			   struct fbnic_napi_vector *nv);
195 void fbnic_napi_free_irq(struct fbnic_dev *fbd,
196 			 struct fbnic_napi_vector *nv);
197 void fbnic_synchronize_irq(struct fbnic_dev *fbd, int nr);
198 int fbnic_request_irq(struct fbnic_dev *dev, int nr, irq_handler_t handler,
199 		      unsigned long flags, const char *name, void *data);
200 void fbnic_free_irq(struct fbnic_dev *dev, int nr, void *data);
201 
202 /**
203  * enum fbnic_msix_self_test_codes - return codes from self test routines
204  *
205  * These are the codes returned from the self test routines and
206  * stored in the test result array indexed by the specific
207  * test name.
208  *
209  * @FBNIC_TEST_MSIX_SUCCESS: no errors
210  * @FBNIC_TEST_MSIX_NOMEM: allocation failure
211  * @FBNIC_TEST_MSIX_IRQ_REQ_FAIL: IRQ request failure
212  * @FBNIC_TEST_MSIX_MASK: masking failed to prevent IRQ
213  * @FBNIC_TEST_MSIX_UNMASK: unmasking failure w/ sw status set
214  * @FBNIC_TEST_MSIX_IRQ_CLEAR: interrupt when clearing mask
215  * @FBNIC_TEST_MSIX_NO_INTERRUPT: no interrupt when not masked
216  * @FBNIC_TEST_MSIX_NO_CLEAR_OR_MASK: status not cleared, or mask not set
217  * @FBNIC_TEST_MSIX_BITS_SET_AFTER_TEST: Bits are set after test
218  */
219 enum fbnic_msix_self_test_codes {
220 	FBNIC_TEST_MSIX_SUCCESS = 0,
221 	FBNIC_TEST_MSIX_NOMEM = 5,
222 	FBNIC_TEST_MSIX_IRQ_REQ_FAIL = 10,
223 	FBNIC_TEST_MSIX_MASK = 20,
224 	FBNIC_TEST_MSIX_UNMASK = 30,
225 	FBNIC_TEST_MSIX_IRQ_CLEAR = 40,
226 	FBNIC_TEST_MSIX_NO_INTERRUPT = 50,
227 	FBNIC_TEST_MSIX_NO_CLEAR_OR_MASK = 60,
228 	FBNIC_TEST_MSIX_BITS_SET_AFTER_TEST = 70,
229 };
230 
231 enum fbnic_msix_self_test_codes fbnic_msix_test(struct fbnic_dev *fbd);
232 
233 void fbnic_free_irqs(struct fbnic_dev *fbd);
234 int fbnic_alloc_irqs(struct fbnic_dev *fbd);
235 
236 void fbnic_get_fw_ver_commit_str(struct fbnic_dev *fbd, char *fw_version,
237 				 const size_t str_sz);
238 
239 void fbnic_dbg_fbd_init(struct fbnic_dev *fbd);
240 void fbnic_dbg_fbd_exit(struct fbnic_dev *fbd);
241 void fbnic_dbg_init(void);
242 void fbnic_dbg_exit(void);
243 
244 void fbnic_rpc_reset_valid_entries(struct fbnic_dev *fbd);
245 
246 int fbnic_mdiobus_create(struct fbnic_dev *fbd);
247 
248 void fbnic_csr_get_regs(struct fbnic_dev *fbd, u32 *data, u32 *regs_version);
249 int fbnic_csr_regs_len(struct fbnic_dev *fbd);
250 
251 void fbnic_config_txrx_usecs(struct fbnic_napi_vector *nv, u32 arm);
252 void fbnic_config_rx_frames(struct fbnic_napi_vector *nv);
253 
254 enum fbnic_boards {
255 	fbnic_board_asic
256 };
257 
258 struct fbnic_info {
259 	unsigned int max_num_queues;
260 	unsigned int bar_mask;
261 };
262 
263 #endif /* _FBNIC_H_ */
264