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Searched refs:ew32 (Results 1 – 20 of 20) sorted by relevance

/linux/drivers/net/ethernet/smsc/
H A Depic100.c178 #define ew32(reg, val) iowrite32(val, ioaddr + (reg)) macro
393 ew32(GENCTL, 0x4200); in epic_init_one()
397 ew32(TEST1, 0x0008); in epic_init_one()
400 ew32(MIICfg, 0x12); in epic_init_one()
402 ew32(NVCTL, (er32(NVCTL) & ~0x003c) | 0x4800); in epic_init_one()
403 ew32(GENCTL, 0x0200); in epic_init_one()
458 ew32(NVCTL, er32(NVCTL) & ~0x483c); in epic_init_one()
459 ew32(GENCTL, 0x0008); in epic_init_one()
530 ew32(INTMASK, 0x00000000); in epic_disable_int()
545 ew32(INTMASK, ep->irq_mask & ~EpicNapiEvent); in epic_napi_irq_off()
[all …]
/linux/drivers/net/ethernet/intel/e1000e/
H A D82571.c154 ew32(EECD, eecd); in e1000_init_nvm_params_82571()
282 ew32(SWSM2, swsm2 | E1000_SWSM2_LOCK); in e1000_init_mac_params_82571()
303 ew32(SWSM, swsm & ~E1000_SWSM_SMBI); in e1000_init_mac_params_82571()
467 ew32(SWSM, swsm | E1000_SWSM_SWESMBI); in e1000_get_hw_semaphore_82571()
498 ew32(SWSM, swsm); in e1000_put_hw_semaphore_82571()
516 ew32(EXTCNF_CTRL, extcnf_ctrl); in e1000_get_hw_semaphore_82573()
549 ew32(EXTCNF_CTRL, extcnf_ctrl); in e1000_put_hw_semaphore_82573()
606 ew32(POEMB, data); in e1000_set_d0_lplu_state_82574()
633 ew32(POEMB, data); in e1000_set_d3_lplu_state_82574()
754 ew32(HICR, E1000_HICR_FW_RESET_ENABLE); in e1000_update_nvm_checksum_82571()
[all …]
H A Dmac.c228 ew32(RAL(index), rar_low); in e1000e_rar_set_generic()
230 ew32(RAH(index), rar_high); in e1000e_rar_set_generic()
499 ew32(TXCW, (mac->txcw & ~E1000_TXCW_ANE)); in e1000e_check_for_fiber_link()
504 ew32(CTRL, ctrl); in e1000e_check_for_fiber_link()
519 ew32(TXCW, mac->txcw); in e1000e_check_for_fiber_link()
520 ew32(CTRL, (ctrl & ~E1000_CTRL_SLU)); in e1000e_check_for_fiber_link()
562 ew32(TXCW, (mac->txcw & ~E1000_TXCW_ANE)); in e1000e_check_for_serdes_link()
567 ew32(CTRL, ctrl); in e1000e_check_for_serdes_link()
582 ew32(TXCW, mac->txcw); in e1000e_check_for_serdes_link()
583 ew32(CTRL, (ctrl & ~E1000_CTRL_SLU)); in e1000e_check_for_serdes_link()
[all …]
H A Dnetdev.c618 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000e_update_rdt_wa()
635 ew32(TCTL, tctl & ~E1000_TCTL_EN); in e1000e_update_tdt_wa()
1109 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); in e1000_print_hw_hang()
1115 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); in e1000_print_hw_hang()
1777 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000_intr_msi()
1856 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000_intr()
1899 ew32(ICS, (icr & adapter->eiac_mask)); in e1000_msix_other()
1909 ew32(IMS, E1000_IMS_OTHER | IMS_OTHER_MASK); in e1000_msix_other()
1926 ew32(ICS, tx_ring->ims_val); in e1000_intr_msix_tx()
1929 ew32(IMS, adapter->tx_ring->ims_val); in e1000_intr_msix_tx()
[all …]
H A Dnvm.c16 ew32(EECD, *eecd); in e1000_raise_eec_clk()
31 ew32(EECD, *eecd); in e1000_lower_eec_clk()
62 ew32(EECD, eecd); in e1000_shift_out_eec_bits()
74 ew32(EECD, eecd); in e1000_shift_out_eec_bits()
155 ew32(EECD, eecd | E1000_EECD_REQ); in e1000e_acquire_nvm()
168 ew32(EECD, eecd); in e1000e_acquire_nvm()
190 ew32(EECD, eecd); in e1000_standby_nvm()
194 ew32(EECD, eecd); in e1000_standby_nvm()
232 ew32(EECD, eecd); in e1000e_release_nvm()
252 ew32(EECD, eecd); in e1000_ready_nvm_eeprom()
[all …]
H A D80003es2lan.c302 ew32(SW_FW_SYNC, swfw_sync); in e1000_acquire_swfw_sync_80003es2lan()
326 ew32(SW_FW_SYNC, swfw_sync); in e1000_release_swfw_sync_80003es2lan()
676 ew32(IMC, 0xffffffff); in e1000_reset_hw_80003es2lan()
678 ew32(RCTL, 0); in e1000_reset_hw_80003es2lan()
679 ew32(TCTL, E1000_TCTL_PSP); in e1000_reset_hw_80003es2lan()
691 ew32(CTRL, ctrl | E1000_CTRL_RST); in e1000_reset_hw_80003es2lan()
715 ew32(IMC, 0xffffffff); in e1000_reset_hw_80003es2lan()
779 ew32(TXDCTL(0), reg_data); in e1000_init_hw_80003es2lan()
785 ew32(TXDCTL(1), reg_data); in e1000_init_hw_80003es2lan()
790 ew32(TCTL, reg_data); in e1000_init_hw_80003es2lan()
[all …]
H A Dich8lan.c240 ew32(CTRL_EXT, mac_reg); in e1000_phy_is_accessible_pchlan()
262 ew32(FEXTNVM3, mac_reg); in e1000_toggle_lanphypc_pch_lpt()
268 ew32(CTRL, mac_reg); in e1000_toggle_lanphypc_pch_lpt()
272 ew32(CTRL, mac_reg); in e1000_toggle_lanphypc_pch_lpt()
314 ew32(FEXTNVM12, fextnvm12); in e1000_reconfigure_k1_params()
400 ew32(CTRL_EXT, mac_reg); in e1000_init_phy_workarounds_pchlan()
436 ew32(CTRL_EXT, mac_reg); in e1000_init_phy_workarounds_pchlan()
1032 ew32(FEXTNVM6, fextnvm6 | E1000_FEXTNVM6_REQ_PLL_CLK); in e1000_k1_workaround_lpt_lp()
1076 ew32(FEXTNVM6, fextnvm6); in e1000_k1_workaround_lpt_lp()
1171 ew32(LTRV, reg); in e1000_platform_pm_pch_lpt()
[all …]
H A Dethtool.c844 ew32(STATUS, toggle); in e1000_reg_test()
853 ew32(STATUS, before); in e1000_reg_test()
1014 ew32(IMC, 0xFFFFFFFF); in e1000_intr_test()
1045 ew32(IMC, mask); in e1000_intr_test()
1046 ew32(ICS, mask); in e1000_intr_test()
1063 ew32(IMS, mask); in e1000_intr_test()
1064 ew32(ICS, mask); in e1000_intr_test()
1081 ew32(IMC, ~mask & 0x00007FFF); in e1000_intr_test()
1082 ew32(ICS, ~mask & 0x00007FFF); in e1000_intr_test()
1094 ew32(IMC, 0xFFFFFFFF); in e1000_intr_test()
[all …]
H A Dptp.c50 ew32(TIMINCA, timinca); in e1000e_phc_adjfine()
106 ew32(TSYNCTXCTL, tsync_ctrl); in e1000e_phc_get_syncdevicetime()
H A Dphy.c153 ew32(MDIC, mdic); in e1000e_read_phy_reg_mdic()
233 ew32(MDIC, mdic); in e1000e_write_phy_reg_mdic()
509 ew32(KMRNCTRLSTA, kmrnctrlsta); in __e1000_read_kmrn_reg()
581 ew32(KMRNCTRLSTA, kmrnctrlsta); in __e1000_write_kmrn_reg()
1511 ew32(CTRL, ctrl); in e1000e_phy_force_speed_duplex_setup()
2155 ew32(CTRL, ctrl | E1000_CTRL_PHY_RST); in e1000e_phy_hw_reset_generic()
2160 ew32(CTRL, ctrl); in e1000e_phy_hw_reset_generic()
H A Dmanage.c279 ew32(HICR, hicr | E1000_HICR_C); in e1000e_mng_write_dhcp_info()
H A De1000.h611 #define ew32(reg, val) __ew32(hw, E1000_##reg, (val)) macro
/linux/drivers/net/ethernet/intel/e1000/
H A De1000_hw.c392 ew32(IMC, 0xffffffff); in e1000_reset_hw()
398 ew32(RCTL, 0); in e1000_reset_hw()
399 ew32(TCTL, E1000_TCTL_PSP); in e1000_reset_hw()
414 ew32(CTRL, (ctrl | E1000_CTRL_PHY_RST)); in e1000_reset_hw()
441 ew32(CTRL_DUP, (ctrl | E1000_CTRL_RST)); in e1000_reset_hw()
445 ew32(CTRL, (ctrl | E1000_CTRL_RST)); in e1000_reset_hw()
462 ew32(CTRL_EXT, ctrl_ext); in e1000_reset_hw()
486 ew32(MANC, manc); in e1000_reset_hw()
496 ew32(LEDCTL, led_ctrl); in e1000_reset_hw()
501 ew32(IMC, 0xffffffff); in e1000_reset_hw()
[all …]
H A De1000_ethtool.c736 ew32(STATUS, toggle); in e1000_reg_test()
745 ew32(STATUS, before); in e1000_reg_test()
855 ew32(IMC, 0xFFFFFFFF); in e1000_intr_test()
872 ew32(IMC, mask); in e1000_intr_test()
873 ew32(ICS, mask); in e1000_intr_test()
890 ew32(IMS, mask); in e1000_intr_test()
891 ew32(ICS, mask); in e1000_intr_test()
908 ew32(IMC, ~mask & 0x00007FFF); in e1000_intr_test()
909 ew32(ICS, ~mask & 0x00007FFF); in e1000_intr_test()
921 ew32(IMC, 0xFFFFFFFF); in e1000_intr_test()
[all …]
H A De1000_main.c281 ew32(IMC, ~0); in e1000_irq_disable()
294 ew32(IMS, IMS_ENABLE_MASK); in e1000_irq_enable()
335 ew32(MANC, manc); in e1000_init_manageability()
349 ew32(MANC, manc); in e1000_release_manageability()
397 ew32(ICS, E1000_ICS_LSC); in e1000_up()
489 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000_down()
497 ew32(TCTL, tctl); in e1000_down()
597 ew32(PBA, pba); in e1000_reset()
649 ew32(PBA, pba); in e1000_reset()
672 ew32(WUC, 0); in e1000_reset()
[all …]
H A De1000_osdep.h32 #define ew32(reg, value) \ macro
/linux/drivers/net/ethernet/intel/igbvf/
H A Dnetdev.c862 ew32(EIMS, adapter->eims_other); in igbvf_msix_other()
888 ew32(EICS, tx_ring->eims_value); in igbvf_intr_msix_tx()
890 ew32(EIMS, tx_ring->eims_value); in igbvf_intr_msix_tx()
991 ew32(IVAR_MISC, tmp); in igbvf_configure_msix()
1158 ew32(EIMC, ~0); in igbvf_irq_disable()
1161 ew32(EIAC, 0); in igbvf_irq_disable()
1172 ew32(EIAC, adapter->eims_enable_mask); in igbvf_irq_enable()
1173 ew32(EIAM, adapter->eims_enable_mask); in igbvf_irq_enable()
1174 ew32(EIMS, adapter->eims_enable_mask); in igbvf_irq_enable()
1202 ew32(EIMS, adapter->rx_ring->eims_value); in igbvf_poll()
[all …]
H A Dmbx.c219 ew32(V2PMAILBOX(0), E1000_V2PMAILBOX_VFU); in e1000_obtain_mbx_lock_vf()
264 ew32(V2PMAILBOX(0), E1000_V2PMAILBOX_REQ); in e1000_write_mbx_vf()
295 ew32(V2PMAILBOX(0), E1000_V2PMAILBOX_ACK); in e1000_read_mbx_vf()
H A Dregs.h77 #define ew32(reg, val) writel((val), hw->hw_addr + E1000_##reg) macro
H A Dvf.c115 ew32(CTRL, ctrl | E1000_CTRL_RST); in e1000_reset_hw_vf()