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Searched refs:dspcntr (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/gma500/
H A Doaktrail_crtc.c374 u32 dpll = 0, fp = 0, dspcntr, pipeconf; in oaktrail_crtc_mode_set() local
492 dspcntr = REG_READ(map->cntr); in oaktrail_crtc_mode_set()
493 dspcntr |= DISPPLANE_GAMMA_ENABLE; in oaktrail_crtc_mode_set()
496 dspcntr |= DISPPLANE_SEL_PIPE_A; in oaktrail_crtc_mode_set()
498 dspcntr |= DISPPLANE_SEL_PIPE_B; in oaktrail_crtc_mode_set()
584 REG_WRITE_WITH_AUX(map->cntr, dspcntr, i); in oaktrail_crtc_mode_set()
604 u32 dspcntr; in oaktrail_pipe_set_base() local
621 dspcntr = REG_READ(map->cntr); in oaktrail_pipe_set_base()
622 dspcntr &= ~DISPPLANE_PIXFORMAT_MASK; in oaktrail_pipe_set_base()
626 dspcntr |= DISPPLANE_8BPP; in oaktrail_pipe_set_base()
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H A Dpsb_intel_display.c108 u32 dpll = 0, fp = 0, dspcntr, pipeconf; in psb_intel_crtc_mode_set() local
201 dspcntr = DISPPLANE_GAMMA_ENABLE; in psb_intel_crtc_mode_set()
204 dspcntr |= DISPPLANE_SEL_PIPE_A; in psb_intel_crtc_mode_set()
206 dspcntr |= DISPPLANE_SEL_PIPE_B; in psb_intel_crtc_mode_set()
208 dspcntr |= DISPLAY_PLANE_ENABLE; in psb_intel_crtc_mode_set()
293 REG_WRITE(map->cntr, dspcntr); in psb_intel_crtc_mode_set()
H A Dgma_display.c69 u32 dspcntr; in gma_pipe_set_base() local
93 dspcntr = REG_READ(map->cntr); in gma_pipe_set_base()
94 dspcntr &= ~DISPPLANE_PIXFORMAT_MASK; in gma_pipe_set_base()
98 dspcntr |= DISPPLANE_8BPP; in gma_pipe_set_base()
102 dspcntr |= DISPPLANE_15_16BPP; in gma_pipe_set_base()
104 dspcntr |= DISPPLANE_16BPP; in gma_pipe_set_base()
108 dspcntr |= DISPPLANE_32BPP_NO_ALPHA; in gma_pipe_set_base()
115 REG_WRITE(map->cntr, dspcntr); in gma_pipe_set_base()
H A Doaktrail_hdmi.c286 u32 dspcntr, pipeconf, dpll, temp; in oaktrail_crtc_hdmi_mode_set() local
360 dspcntr = REG_READ(dspcntr_reg); in oaktrail_crtc_hdmi_mode_set()
361 dspcntr |= DISPPLANE_GAMMA_ENABLE; in oaktrail_crtc_hdmi_mode_set()
362 dspcntr |= DISPPLANE_SEL_PIPE_B; in oaktrail_crtc_hdmi_mode_set()
363 dspcntr |= DISPLAY_PLANE_ENABLE; in oaktrail_crtc_hdmi_mode_set()
376 REG_WRITE(dspcntr_reg, dspcntr); in oaktrail_crtc_hdmi_mode_set()
H A Dcdv_intel_display.c585 u32 dpll = 0, dspcntr, pipeconf; in cdv_intel_crtc_mode_set() local
713 dspcntr = DISPPLANE_GAMMA_ENABLE; in cdv_intel_crtc_mode_set()
716 dspcntr |= DISPPLANE_SEL_PIPE_A; in cdv_intel_crtc_mode_set()
718 dspcntr |= DISPPLANE_SEL_PIPE_B; in cdv_intel_crtc_mode_set()
720 dspcntr |= DISPLAY_PLANE_ENABLE; in cdv_intel_crtc_mode_set()
809 REG_WRITE(map->cntr, dspcntr); in cdv_intel_crtc_mode_set()
H A Dpsb_drv.h521 u32 dspcntr[3]; member