Searched refs:drr_timing (Results 1 – 4 of 4) sorted by relevance
432 …_schedulable(struct dml2_context *ctx, struct dc_state *context, struct dc_crtc_timing *drr_timing) in dml2_svp_drr_schedulable() argument470 drr_frame_us = drr_timing->v_total * drr_timing->h_total / in dml2_svp_drr_schedulable()471 (double)(drr_timing->pix_clk_100hz * 100) * 1000000; in dml2_svp_drr_schedulable()476 drr_stretched_vblank_us = (drr_timing->v_total - drr_timing->v_addressable) * drr_timing->h_total / in dml2_svp_drr_schedulable()477 (double)(drr_timing->pix_clk_100hz * 100) * 1000000 + (stretched_drr_us - drr_frame_us); in dml2_svp_drr_schedulable()485 if (stretched_drr_us < (1 / (double)drr_timing->min_refresh_in_uhz) * 1000000 * 1000000 && in dml2_svp_drr_schedulable()
50 …schedulable(struct dml2_context *ctx, struct dc_state *context, struct dc_crtc_timing *drr_timing);
591 struct dc_crtc_timing *drr_timing = &vblank_pipe->stream->timing; in populate_subvp_cmd_drr_info() local613 drr_frame_us = div64_u64(((uint64_t)drr_timing->v_total * drr_timing->h_total * 1000000), in populate_subvp_cmd_drr_info()614 (((uint64_t)drr_timing->pix_clk_100hz * 100))); in populate_subvp_cmd_drr_info()619 …min_vtotal_supported = div64_u64(((uint64_t)drr_timing->pix_clk_100hz * 100 * min_drr_supported_us… in populate_subvp_cmd_drr_info()620 (((uint64_t)drr_timing->h_total * 1000000))); in populate_subvp_cmd_drr_info()626 drr_active_us = div64_u64(((uint64_t)drr_timing->v_addressable * drr_timing->h_total * 1000000), in populate_subvp_cmd_drr_info()627 (((uint64_t)drr_timing->pix_clk_100hz * 100))); in populate_subvp_cmd_drr_info()632 …max_vtotal_supported = div64_u64(((uint64_t)drr_timing->pix_clk_100hz * 100 * max_drr_supported_us… in populate_subvp_cmd_drr_info()633 (((uint64_t)drr_timing->h_total * 1000000))); in populate_subvp_cmd_drr_info()
805 struct dc_crtc_timing *drr_timing = NULL; in subvp_drr_schedulable() local854 drr_timing = &drr_pipe->stream->timing; in subvp_drr_schedulable()860 drr_frame_us = drr_timing->v_total * drr_timing->h_total / in subvp_drr_schedulable()861 (double)(drr_timing->pix_clk_100hz * 100) * 1000000; in subvp_drr_schedulable()866 …drr_stretched_vblank_us = (drr_timing->v_total - drr_timing->v_addressable) * drr_timing->h_total / in subvp_drr_schedulable()867 (double)(drr_timing->pix_clk_100hz * 100) * 1000000 + (stretched_drr_us - drr_frame_us); in subvp_drr_schedulable()876 if (drr_timing && in subvp_drr_schedulable()877 stretched_drr_us < (1 / (double)drr_timing->min_refresh_in_uhz) * 1000000 * 1000000 && in subvp_drr_schedulable()