Searched refs:dml2_core_internal_soc_state_max (Results 1 – 2 of 2) sorted by relevance
330 case dml2_core_internal_soc_state_max: in dml2_core_utils_internal_soc_state_type_str()
43 case dml2_core_internal_soc_state_max: in dml2_core_internal_soc_state_type_str()2748 double avg_bandwidth_available_min[dml2_core_internal_soc_state_max], in calculate_bandwidth_available() argument2749 double avg_bandwidth_available[dml2_core_internal_soc_state_max][dml2_core_internal_bw_max], in calculate_bandwidth_available()2750 double urg_bandwidth_available_min[dml2_core_internal_soc_state_max], // min between SDP and DRAM in calculate_bandwidth_available() argument2751 double urg_bandwidth_available[dml2_core_internal_soc_state_max][dml2_core_internal_bw_max], in calculate_bandwidth_available()2752 double urg_bandwidth_available_vm_only[dml2_core_internal_soc_state_max], in calculate_bandwidth_available() argument2753 double urg_bandwidth_available_pixel_and_vm[dml2_core_internal_soc_state_max], in calculate_bandwidth_available() argument2768 for (m = 0; m < dml2_core_internal_soc_state_max; m++) { in calculate_bandwidth_available()2807 double avg_bandwidth_required[dml2_core_internal_soc_state_max][dml2_core_internal_bw_max], in calculate_avg_bandwidth_required()2826 for (m = 0; m < dml2_core_internal_soc_state_max; m++) { in calculate_avg_bandwidth_required()[all …]