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Searched refs:deferred_reg_writes (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dpp/dcn30/
H A Ddcn30_dpp.c545 if (dpp_base->deferred_reg_writes.bits.disable_dscl) { in dpp3_deferred_update()
547 dpp_base->deferred_reg_writes.bits.disable_dscl = false; in dpp3_deferred_update()
550 if (dpp_base->deferred_reg_writes.bits.disable_gamcor) { in dpp3_deferred_update()
556 dpp_base->deferred_reg_writes.bits.disable_gamcor = false; in dpp3_deferred_update()
559 if (dpp_base->deferred_reg_writes.bits.disable_blnd_lut) { in dpp3_deferred_update()
565 dpp_base->deferred_reg_writes.bits.disable_blnd_lut = false; in dpp3_deferred_update()
568 if (dpp_base->deferred_reg_writes.bits.disable_3dlut) { in dpp3_deferred_update()
574 dpp_base->deferred_reg_writes.bits.disable_3dlut = false; in dpp3_deferred_update()
577 if (dpp_base->deferred_reg_writes.bits.disable_shaper) { in dpp3_deferred_update()
583 dpp_base->deferred_reg_writes.bits.disable_shaper = false; in dpp3_deferred_update()
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H A Ddcn30_dpp_cm.c138 dpp_base->deferred_reg_writes.bits.disable_gamcor = true; in dpp3_power_on_gamcor_lut()
/linux/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Ddpp.h82 union defer_reg_writes deferred_reg_writes; member
/linux/drivers/gpu/drm/amd/display/dc/dpp/dcn10/
H A Ddcn10_dpp_dscl.c170 dpp->base.deferred_reg_writes.bits.disable_dscl = true; in dpp1_power_on_dscl()