| /linux/drivers/gpu/drm/amd/display/dc/hubbub/dcn401/ |
| H A D | dcn401_hubbub.c | 78 if (safe_to_lower || watermarks->dcn4x.a.urgent > hubbub2->watermarks.dcn4x.a.urgent) { in hubbub401_program_urgent_watermarks()
79 hubbub2->watermarks.dcn4x.a.urgent = watermarks->dcn4x.a.urgent; in hubbub401_program_urgent_watermarks()
81 DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A, watermarks->dcn4x.a.urgent); in hubbub401_program_urgent_watermarks()
84 watermarks->dcn4x.a.urgent, watermarks->dcn4x.a.urgent); in hubbub401_program_urgent_watermarks()
85 } else if (watermarks->dcn4x.a.urgent < hubbub2->watermarks.dcn4x.a.urgent) in hubbub401_program_urgent_watermarks()
89 if (safe_to_lower || watermarks->dcn4x in hubbub401_program_urgent_watermarks()
[all...] |
| /linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_dpmm/ |
| H A D | dml2_dpmm_dcn4.c | 85 in_out->programming->min_clocks.dcn4x.active.uclk_khz = dml_round_up(min_uclk_bw > min_uclk_latency ? min_uclk_bw : min_uclk_latency); in calculate_system_active_minimums()
86 in_out->programming->min_clocks.dcn4x.active.fclk_khz = dml_round_up(min_fclk_bw > min_fclk_latency ? min_fclk_bw : min_fclk_latency); in calculate_system_active_minimums()
87 in_out->programming->min_clocks.dcn4x.active.dcfclk_khz = dml_round_up(min_dcfclk_bw > min_dcfclk_latency ? min_dcfclk_bw : min_dcfclk_latency); in calculate_system_active_minimums()
126 in_out->programming->min_clocks.dcn4x.svp_prefetch.uclk_khz = dml_round_up(min_uclk_bw > min_uclk_latency ? min_uclk_bw : min_uclk_latency); in calculate_svp_prefetch_minimums()
127 in_out->programming->min_clocks.dcn4x.svp_prefetch.fclk_khz = dml_round_up(min_fclk_bw > min_fclk_latency ? min_fclk_bw : min_fclk_latency); in calculate_svp_prefetch_minimums()
128 in_out->programming->min_clocks.dcn4x.svp_prefetch.dcfclk_khz = dml_round_up(min_dcfclk_bw > min_dcfclk_latency ? min_dcfclk_bw : min_dcfclk_latency); in calculate_svp_prefetch_minimums()
157 in_out->programming->min_clocks.dcn4x.svp_prefetch_no_throttle.uclk_khz = dml_round_up(min_uclk_bw > min_uclk_latency ? min_uclk_bw : min_uclk_latency); in calculate_svp_prefetch_minimums()
158 in_out->programming->min_clocks.dcn4x.svp_prefetch_no_throttle.fclk_khz = dml_round_up(min_fclk_bw > min_fclk_latency ? min_fclk_bw : min_fclk_latency); in calculate_svp_prefetch_minimums()
159 in_out->programming->min_clocks.dcn4x.svp_prefetch_no_throttle.dcfclk_khz = dml_round_up(min_dcfclk_bw > min_dcfclk_latency ? min_dcfclk_bw : min_dcfclk_latency); in calculate_svp_prefetch_minimums()
181 in_out->programming->min_clocks.dcn4x in calculate_idle_minimums()
[all...] |
| /linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/ |
| H A D | dml_top_types.h | 221 } dcn4x; member
257 } dcn4x; member
268 } dcn4x; member
408 } dcn4x; member
|
| H A D | dml_top_soc_parameter_types.h | 84 struct dml2_dcn4x_soc_qos_params dcn4x; member
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| /linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/ |
| H A D | dml21_translation_helper.c | 1154 context->bw_ctx.bw.dcn.clk.dispclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.dispclk_khz; in dml21_copy_clocks_to_dc_state()
1155 context->bw_ctx.bw.dcn.clk.dcfclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.active.dcfclk_khz; in dml21_copy_clocks_to_dc_state()
1156 context->bw_ctx.bw.dcn.clk.dramclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.active.uclk_khz; in dml21_copy_clocks_to_dc_state()
1157 context->bw_ctx.bw.dcn.clk.fclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.active.fclk_khz; in dml21_copy_clocks_to_dc_state()
1158 context->bw_ctx.bw.dcn.clk.idle_dramclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.idle.uclk_khz; in dml21_copy_clocks_to_dc_state()
1159 context->bw_ctx.bw.dcn.clk.idle_fclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.idle.fclk_khz; in dml21_copy_clocks_to_dc_state()
1160 context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.deepsleep_dcfclk_khz; in dml21_copy_clocks_to_dc_state()
1163 context->bw_ctx.bw.dcn.clk.dtbclk_en = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.dtbrefclk_khz > 0; in dml21_copy_clocks_to_dc_state()
1164 context->bw_ctx.bw.dcn.clk.ref_dtbclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.dtbrefclk_khz; in dml21_copy_clocks_to_dc_state()
1165 context->bw_ctx.bw.dcn.clk.socclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x in dml21_copy_clocks_to_dc_state()
[all...] |
| H A D | dml21_utils.c | 230 pipe_ctx->plane_res.bw.dppclk_khz = pln_prog->min_clocks.dcn4x.dppclk_khz; in dml21_program_dc_pipe()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| H A D | dcn401_hwseq.c | 820 (unsigned int)pipe_ctx->global_sync.dcn4x.vready_offset_pixels, in dcn401_enable_stream_timing()
821 (unsigned int)pipe_ctx->global_sync.dcn4x.vstartup_lines, in dcn401_enable_stream_timing()
822 (unsigned int)pipe_ctx->global_sync.dcn4x.vupdate_offset_pixels, in dcn401_enable_stream_timing()
823 (unsigned int)pipe_ctx->global_sync.dcn4x.vupdate_vupdate_width_pixels, in dcn401_enable_stream_timing()
824 (unsigned int)pipe_ctx->global_sync.dcn4x.pstate_keepout_start_lines, in dcn401_enable_stream_timing()
1910 unsigned int vready_offset = pipe->global_sync.dcn4x.vready_offset_pixels; in dcn401_calculate_vready_offset_for_group()
1914 if (other_pipe->global_sync.dcn4x.vready_offset_pixels > vready_offset) in dcn401_calculate_vready_offset_for_group()
1915 vready_offset = other_pipe->global_sync.dcn4x.vready_offset_pixels; in dcn401_calculate_vready_offset_for_group()
1918 if (other_pipe->global_sync.dcn4x.vready_offset_pixels > vready_offset) in dcn401_calculate_vready_offset_for_group()
1919 vready_offset = other_pipe->global_sync.dcn4x in dcn401_calculate_vready_offset_for_group()
[all...] |
| /linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/bounding_boxes/ |
| H A D | dcn4_soc_bb.h | 55 .dcn4x = {
181 .dcn4x = {
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| /linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| H A D | mem_input.h | 66 } dcn4x; //dcn4+ member
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| /linux/drivers/gpu/drm/amd/display/dc/hubp/dcn401/ |
| H A D | dcn401_hubp.c | 151 unsigned int vstartup_lines = pipe_global_sync->dcn4x.vstartup_lines; in hubp401_vready_at_or_After_vsync()
152 unsigned int vupdate_offset_pixels = pipe_global_sync->dcn4x.vupdate_offset_pixels; in hubp401_vready_at_or_After_vsync()
153 unsigned int vupdate_width_pixels = pipe_global_sync->dcn4x.vupdate_vupdate_width_pixels; in hubp401_vready_at_or_After_vsync()
154 unsigned int vready_offset_pixels = pipe_global_sync->dcn4x.vready_offset_pixels; in hubp401_vready_at_or_After_vsync()
|
| /linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/ |
| H A D | dml2_core_dcn4_calcs.c | 7240 struct dml2_dcn4x_soc_qos_params *dcn4x, in get_max_urgent_latency_us() argument
7246 latency = dcn4x->per_uclk_dpm_params[min_clk_index].maximum_latency_when_urgent_uclk_cycles / uclk_freq_mhz in get_max_urgent_latency_us()
7247 * (1 + dcn4x->umc_max_latency_margin / 100.0) in get_max_urgent_latency_us()
7248 + dcn4x->mall_overhead_fclk_cycles / FabricClock in get_max_urgent_latency_us()
7249 + dcn4x->max_round_trip_to_furthest_cs_fclk_cycles / FabricClock in get_max_urgent_latency_us()
7250 * (1 + dcn4x->fabric_max_transport_latency_margin / 100.0); in get_max_urgent_latency_us()
7862 s->mSOCParameters.max_urgent_latency_us = get_max_urgent_latency_us(&mode_lib->soc.qos_parameters.qos_params.dcn4x, mode_lib->ms.uclk_freq_mhz, mode_lib->ms.FabricClock, mode_lib->ms.state_idx); in dml_core_ms_prefetch_check()
7863 s->mSOCParameters.df_response_time_us = mode_lib->soc.qos_parameters.qos_params.dcn4x.df_qos_response_time_fclk_cycles / mode_lib->ms.FabricClock; in dml_core_ms_prefetch_check()
7951 mode_lib->ms.qos_param_index = get_qos_param_index((unsigned int) (mode_lib->ms.uclk_freq_mhz * 1000.0), mode_lib->soc.qos_parameters.qos_params.dcn4x.per_uclk_dpm_params); in dml_core_mode_support()
9049 mode_lib->soc.qos_parameters.qos_params.dcn4x in dml_core_mode_support()
[all...] |
| H A D | dml2_core_dcn4.c | 561 l->mode_programming_ex_params.min_clk_index = lookup_uclk_dpm_index_by_freq(in_out->programming->min_clocks.dcn4x.active.uclk_khz, in core_dcn4_mode_programming()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn401/ |
| H A D | dcn401_resource.c | 1770 return pipe_ctx->global_sync.dcn4x.vstartup_lines; in dcn401_get_vstartup_for_pipe()
|