Searched refs:dcn32_smu_set_hard_min_by_freq (Results 1 – 3 of 3) sorted by relevance
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/ |
H A D | dcn32_clk_mgr.c | 411 dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DISPCLK, in dcn32_update_clocks_update_dentist() 458 dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DISPCLK, in dcn32_update_clocks_update_dentist() 683 dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DCFCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_khz)); in dcn32_update_clocks() 719 dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, dc->clk_mgr->bw_params->max_memclk_mhz); in dcn32_update_clocks() 721 dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, in dcn32_update_clocks() 724 dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, dc->clk_mgr->bw_params->max_memclk_mhz); in dcn32_update_clocks() 760 dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_UCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dramclk_khz)); in dcn32_update_clocks() 785 dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DPPCLK, in dcn32_update_clocks() 806 dcn32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DTBCLK, khz_to_mhz_ceil(new_clocks->ref_dtbclk_khz)); in dcn32_update_clocks() 824 dcn32_smu_set_hard_min_by_freq(clk_mg in dcn32_update_clocks() [all...] |
H A D | dcn32_clk_mgr_smu_msg.h | 43 unsigned int dcn32_smu_set_hard_min_by_freq(struct clk_mgr_internal *clk_mgr, uint32_t clk, uint16_t freq_mhz);
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H A D | dcn32_clk_mgr_smu_msg.c | 280 unsigned int dcn32_smu_set_hard_min_by_freq(struct clk_mgr_internal *clk_mgr, uint32_t clk, uint16_t freq_mhz) in dcn32_smu_set_hard_min_by_freq() function
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