| /linux/drivers/gpu/drm/amd/display/dc/hwss/ |
| H A D | hw_sequencer_private.h | 69 struct dce_hwseq;
123 void (*disable_vga)(struct dce_hwseq *hws);
133 void (*enable_power_gating_plane)(struct dce_hwseq *hws,
136 struct dce_hwseq *hws,
140 struct dce_hwseq *hws,
144 struct dce_hwseq *hws,
147 void (*dpp_pg_control)(struct dce_hwseq *hws,
150 void (*hubp_pg_control)(struct dce_hwseq *hws,
153 void (*dsc_pg_control)(struct dce_hwseq *hws,
156 bool (*dsc_pg_status)(struct dce_hwseq *hws,
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| H A D | hw_sequencer.h | 47 struct dce_hwseq;
578 struct dce_hwseq *hws;
584 struct dce_hwseq *hws;
598 struct dce_hwseq *hws;
609 struct dce_hwseq *hws;
1022 void (*update_dchub)(struct dce_hwseq *hws,
1118 int (*init_sys_ctx)(struct dce_hwseq *hws,
1121 void (*init_vm_ctx)(struct dce_hwseq *hws,
1263 void (*setup_hpo_hw_control)(const struct dce_hwseq *hws, bool enable);
1849 struct dce_hwseq *hws,
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| H A D | Makefile | 48 HWSS_DCE = dce_hwseq.o
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn314/ |
| H A D | dcn314_hwseq.h | 36 void dcn314_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on);
38 void dcn314_enable_power_gating_plane(struct dce_hwseq *hws, bool enable);
44 void dcn314_resync_fifo_dccg_dio(struct dce_hwseq *hws, struct dc *dc, struct dc_state *context, un…
46 void dcn314_dpp_root_clock_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool clock_on);
50 void dcn314_dpp_pg_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool power_on);
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| H A D | dcn20_hwseq.h | 97 struct dce_hwseq *hws);
100 struct dce_hwseq *hws,
103 struct dce_hwseq *hws,
107 struct dce_hwseq *hws,
126 struct dce_hwseq *hws,
134 struct dce_hwseq *hws,
140 void dcn20_dccg_init(struct dce_hwseq *hws);
141 int dcn20_init_sys_ctx(struct dce_hwseq *hws,
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| H A D | dcn20_hwseq.c | 309 struct dce_hwseq *hws, in dcn20_enable_power_gating_plane()
358 void dcn20_dccg_init(struct dce_hwseq *hws) in dcn20_dccg_init()
367 struct dce_hwseq *hws) in dcn20_disable_vga()
394 struct dce_hwseq *hws = dc->hwseq; in dcn20_init_blank()
460 struct dce_hwseq *hws, in dcn20_dsc_pg_control()
537 struct dce_hwseq *hws, in dcn20_dpp_pg_control()
619 struct dce_hwseq *hws, in dcn20_hubp_pg_control()
697 struct dce_hwseq *hws = dc->hwseq; in dcn20_plane_atomic_disable()
821 struct dce_hwseq *hws = dc->hwseq; in dcn20_enable_stream_timing()
1104 struct dce_hwseq *hws = dc->hwseq; in dcn20_set_input_transfer_func()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn31/ |
| H A D | dcn31_hwseq.h | 36 struct dce_hwseq *hws,
41 struct dce_hwseq *hws,
49 void dcn31_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on);
50 int dcn31_init_sys_ctx(struct dce_hwseq *hws, struct dc *dc, struct dc_phy_addr_space_config *pa_co…
59 void dcn31_setup_hpo_hw_control(const struct dce_hwseq *hws, bool enable);
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| H A D | dcn31_hwseq.c | 74 struct dce_hwseq *hws = dc->hwseq; in enable_memory_low_power()
114 struct dce_hwseq *hws = dc->hwseq; in dcn31_init_hw()
280 struct dce_hwseq *hws, in dcn31_dsc_pg_control()
344 struct dce_hwseq *hws, in dcn31_enable_power_gating_plane()
446 void dcn31_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on) in dcn31_hubp_pg_control()
485 int dcn31_init_sys_ctx(struct dce_hwseq *hws, struct dc *dc, struct dc_phy_addr_space_config *pa_co… in dcn31_init_sys_ctx()
616 struct dce_hwseq *hws = dc->hwseq; in dcn31_reset_hw_ctx_wrap()
658 void dcn31_setup_hpo_hw_control(const struct dce_hwseq *hws, bool enable) in dcn31_setup_hpo_hw_control()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn303/ |
| H A D | dcn303_hwseq.h | 32 void dcn303_dpp_pg_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool power_on);
33 void dcn303_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on);
34 void dcn303_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on);
35 void dcn303_enable_power_gating_plane(struct dce_hwseq *hws, bool enable);
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| H A D | dcn303_hwseq.c | 46 void dcn303_dpp_pg_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool power_on) in dcn303_dpp_pg_control()
51 void dcn303_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on) in dcn303_hubp_pg_control()
56 void dcn303_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on) in dcn303_dsc_pg_control()
61 void dcn303_enable_power_gating_plane(struct dce_hwseq *hws, bool enable) in dcn303_enable_power_gating_plane()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dce/ |
| H A D | dce_hwseq.c | 40 void dce_enable_fe_clock(struct dce_hwseq *hws, in dce_enable_fe_clock()
53 struct dce_hwseq *hws = dc->hwseq; in dce_pipe_control_lock()
97 void dce_set_blender_mode(struct dce_hwseq *hws, in dce_set_blender_mode()
138 static void dce_disable_sram_shut_down(struct dce_hwseq *hws) in dce_disable_sram_shut_down()
145 static void dce_underlay_clock_enable(struct dce_hwseq *hws) in dce_underlay_clock_enable()
163 void dce_clock_gating_power_up(struct dce_hwseq *hws, in dce_clock_gating_power_up()
175 void dce_crtc_switch_to_clk_src(struct dce_hwseq *hws, in dce_crtc_switch_to_clk_src()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn32/ |
| H A D | dcn32_hwseq.h | 34 struct dce_hwseq *hws,
39 struct dce_hwseq *hws,
42 void dcn32_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on);
78 void dcn32_resync_fifo_dccg_dio(struct dce_hwseq *hws, struct dc *dc, struct dc_state *context, uns…
107 struct dce_hwseq *hws,
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| H A D | dcn32_hwseq.c | 71 struct dce_hwseq *hws, in dcn32_dsc_pg_control()
138 struct dce_hwseq *hws, in dcn32_enable_power_gating_plane()
167 void dcn32_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on) in dcn32_hubp_pg_control()
533 struct dce_hwseq *hws = dc->hwseq; in dcn32_set_input_transfer_func()
731 struct dce_hwseq *hws = dc->hwseq; in dcn32_program_mall_pipe_config()
788 struct dce_hwseq *hws = dc->hwseq; in dcn32_init_hw()
1196 struct dce_hwseq *hws = stream->ctx->dc->hwseq; in dcn32_calculate_dccg_k1_k2_values()
1234 struct dce_hwseq *hws = dc->hwseq; in dcn32_calculate_pix_rate_divider()
1251 void dcn32_resync_fifo_dccg_dio(struct dce_hwseq *hws, struct dc *dc, struct dc_state *context, uns… in dcn32_resync_fifo_dccg_dio()
1316 struct dce_hwseq *hws = link->dc->hwseq; in dcn32_unblank_stream()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn302/ |
| H A D | dcn302_hwseq.h | 31 void dcn302_dpp_pg_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool power_on);
32 void dcn302_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on);
33 void dcn302_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on);
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| H A D | dcn302_hwseq.c | 45 void dcn302_dpp_pg_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool power_on) in dcn302_dpp_pg_control()
102 void dcn302_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on) in dcn302_hubp_pg_control()
159 void dcn302_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on) in dcn302_dsc_pg_control()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/ |
| H A D | dcn201_hwseq.c | 88 static bool gpu_addr_to_uma(struct dce_hwseq *hwseq, in gpu_addr_to_uma()
110 static void plane_address_in_gpu_space_to_uma(struct dce_hwseq *hwseq, in plane_address_in_gpu_space_to_uma()
141 struct dce_hwseq *hws = dc->hwseq; in dcn201_update_plane_addr()
171 struct dce_hwseq *hws = dc->hwseq; in dcn201_init_blank()
205 static void read_mmhub_vm_setup(struct dce_hwseq *hws) in read_mmhub_vm_setup()
230 struct dce_hwseq *hws = dc->hwseq; in dcn201_init_hw()
382 struct dce_hwseq *hws = dc->hwseq; in dcn201_plane_atomic_disconnect()
533 struct dce_hwseq *hws = dc->hwseq; in dcn201_pipe_control_lock()
600 struct dce_hwseq *hws = link->dc->hwseq; in dcn201_unblank_stream()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dce120/ |
| H A D | dce120_hwseq.c | 195 struct dce_hwseq *hws, in dce120_update_dchub()
251 bool dce121_xgmi_enabled(struct dce_hwseq *hws) in dce121_xgmi_enabled()
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| H A D | dce120_hwseq.h | 34 bool dce121_xgmi_enabled(struct dce_hwseq *hws);
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
| H A D | dcn10_hwseq.c | 256 struct dce_hwseq *hws = dc->hwseq; in log_mpc_crc()
832 struct dce_hwseq *hws, in dcn10_enable_power_gating_plane()
854 struct dce_hwseq *hws) in dcn10_disable_vga()
896 struct dce_hwseq *hws, in dcn10_dpp_pg_control()
957 struct dce_hwseq *hws, in dcn10_hubp_pg_control()
1009 struct dce_hwseq *hws, in power_on_plane_resources()
1036 struct dce_hwseq *hws = dc->hwseq; in undo_DEGVIDCN10_253_wa()
1056 struct dce_hwseq *hws = dc->hwseq; in apply_DEGVIDCN10_253_wa()
1086 struct dce_hwseq *hws = dc->hwseq; in dcn10_bios_golden_init()
1445 struct dce_hwseq *hws = dc->hwseq; in dcn10_plane_atomic_disconnect()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn21/ |
| H A D | dcn21_hwseq.h | 33 int dcn21_init_sys_ctx(struct dce_hwseq *hws,
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| H A D | dcn21_hwseq.c | 54 struct dce_hwseq *hws) in mmhub_update_page_table_config()
68 int dcn21_init_sys_ctx(struct dce_hwseq *hws, struct dc *dc, struct dc_phy_addr_space_config *pa_co… in dcn21_init_sys_ctx()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dce120/ |
| H A D | dce120_resource.c | 813 static struct dce_hwseq *dce120_hwseq_create( in dce120_hwseq_create()
816 struct dce_hwseq *hws = kzalloc_obj(struct dce_hwseq); in dce120_hwseq_create()
827 static struct dce_hwseq *dce121_hwseq_create( in dce121_hwseq_create()
830 struct dce_hwseq *hws = kzalloc_obj(struct dce_hwseq); in dce121_hwseq_create()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn35/ |
| H A D | dcn35_hwseq.c | 80 struct dce_hwseq *hws = dc->hwseq;
126 void dcn35_set_dmu_fgcg(struct dce_hwseq *hws, bool enable) in dcn35_set_dmu_fgcg()
135 void dcn35_setup_hpo_hw_control(const struct dce_hwseq *hws, bool enable) in dcn35_setup_hpo_hw_control()
143 struct dce_hwseq *hws = dc->hwseq; in dcn35_init_hw()
481 void dcn35_dpp_root_clock_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool clock_on) in dcn35_dpp_root_clock_control()
492 void dcn35_dpstream_root_clock_control(struct dce_hwseq *hws, unsigned int dp_hpo_inst, bool clock_… in dcn35_dpstream_root_clock_control()
503 void dcn35_physymclk_root_clock_control(struct dce_hwseq *hws, unsigned int phy_inst, bool clock_on) in dcn35_physymclk_root_clock_control()
624 struct dce_hwseq *hws = dc->hwseq; in dcn35_init_pipes()
896 struct dce_hwseq *hws = dc->hwseq; in dcn35_disable_plane()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| H A D | dcn401_hwseq.c | 143 struct dce_hwseq *hws = dc->hwseq; in dcn401_init_hw()
770 struct dce_hwseq *hws = dc->hwseq; in dcn401_enable_stream_timing()
1013 void dcn401_setup_hpo_hw_control(const struct dce_hwseq *hws, bool enable) in dcn401_setup_hpo_hw_control()
1765 struct dce_hwseq *hws = link->dc->hwseq; in dcn401_unblank_stream()
2056 struct dce_hwseq *hws = dc->hwseq; in dcn401_reset_hw_ctx_wrap()
2114 struct dce_hwseq *hws) in dcn401_program_tg()
2139 struct dce_hwseq *hws = dc->hwseq; in dcn401_program_pipe()
2265 struct dce_hwseq *hws = dc->hwseq; in dcn401_program_pipe_sequence()
2408 struct dce_hwseq *hws = dc->hwseq; in dcn401_program_front_end_for_ctx()
2573 struct dce_hwseq *hwseq = dc->hwseq; in dcn401_post_unlock_program_front_end()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn20/ |
| H A D | dcn20_resource.h | 73 struct dce_hwseq *dcn20_hwseq_create(
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