Searched refs:dc_psr_state (Results 1 – 8 of 8) sorted by relevance
44 void (*psr_get_state)(struct dmub_psr *dmub, enum dc_psr_state *dc_psr_state,
43 static enum dc_psr_state convert_psr_state(uint32_t raw_state) in convert_psr_state()45 enum dc_psr_state state = PSR_STATE0; in convert_psr_state()108 static void dmub_psr_get_state(struct dmub_psr *dmub, enum dc_psr_state *state, uint8_t panel_inst) in dmub_psr_get_state()184 enum dc_psr_state state = PSR_STATE0; in dmub_psr_enable()233 enum dc_psr_state state = PSR_STATE0; in dmub_psr_set_level()
106 static void dce_get_dmcu_psr_state(struct dmcu *dmcu, enum dc_psr_state *state) in dce_get_dmcu_psr_state()121 *state = (enum dc_psr_state)REG_READ(DMCU_IRAM_RD_DATA); in dce_get_dmcu_psr_state()136 enum dc_psr_state state = PSR_STATE0; in dce_dmcu_set_psr_enable()519 static void dcn10_get_dmcu_psr_state(struct dmcu *dmcu, enum dc_psr_state *state) in dcn10_get_dmcu_psr_state()538 *state = (enum dc_psr_state)REG_READ(DMCU_IRAM_RD_DATA); in dcn10_get_dmcu_psr_state()553 enum dc_psr_state state = PSR_STATE0; in dcn10_dmcu_set_psr_enable()
69 void (*get_psr_state)(struct dmcu *dmcu, enum dc_psr_state *dc_psr_state);
267 enum dc_psr_state psr_state = PSR_STATE0; in amdgpu_dm_psr_wait_disable()
3210 enum dc_psr_state state = PSR_STATE0; in psr_get()
594 enum dc_psr_state { enum
2459 bool dc_link_get_psr_state(const struct dc_link *dc_link, enum dc_psr_state *state);